Damaraju; Satish
Patent Applications and Registrations
Patent applications and USPTO patent grants for Damaraju; Satish.The latest application filed is for "high speed memory system integration".
- Damaraju; Satish - El Dorado Hills CA
- Damaraju; Satish - Rancho Cardova CA
| Patent | Date |
|---|---|
| Multibit vectored sequential with scan Grant 11,442,103 - Agarwal , et al. September 13, 2 | 2022-09-13 |
| Low-power single-edge triggered flip-flop, and time borrowing internally stitched flip-flop Grant 11,398,814 - Hsu , et al. July 26, 2 | 2022-07-26 |
| High Speed Memory System Integration App 20220197806 - TOMISHIMA; Shigeki ; et al. | 2022-06-23 |
| Low-power Single-edge Triggered Flip-flop, And Time Borrowing Internally Stitched Flip-flop App 20210281250 - Hsu; Steven ; et al. | 2021-09-09 |
| Multibit Vectored Sequential With Scan App 20210263100 - Agarwal; Amit ; et al. | 2021-08-26 |
| Multibit vectored sequential with scan Grant 11,009,549 - Agarwal , et al. May 18, 2 | 2021-05-18 |
| Multibit Vectored Sequential With Scan App 20200150179 - Agarwal; Amit ; et al. | 2020-05-14 |
| Multibit vectored sequential with scan Grant 10,473,718 - Agarwal , et al. Nov | 2019-11-12 |
| Multibit Vectored Sequential With Scan App 20190187208 - Agarwal; Amit ; et al. | 2019-06-20 |
| System and method for reducing power consumption in a device using register files Grant 8,356,202 - Damaraju , et al. January 15, 2 | 2013-01-15 |
| Circuit technique to reduce leakage during reduced power mode Grant 7,805,619 - Cherukuri , et al. September 28, 2 | 2010-09-28 |
| Power-performance modulation in caches using a smart least recently used scheme Grant 7,689,772 - Damaraju , et al. March 30, 2 | 2010-03-30 |
| System And Method For Reducing Power Consumption In A Device Using Register Files App 20090249041 - Damaraju; Satish ; et al. | 2009-10-01 |
| Reducing power consumption in a sequential cache Grant 7,457,917 - Damaraju , et al. November 25, 2 | 2008-11-25 |
| Power-performance modulation in caches using a smart least recently used scheme App 20070260818 - Damaraju; Satish ; et al. | 2007-11-08 |
| Circuit technique to reduce leakage during reduced power mode App 20070236256 - Cherukuri; John R. ; et al. | 2007-10-11 |
| Low power cache architecture Grant 7,136,984 - Maiyuran , et al. November 14, 2 | 2006-11-14 |
| Low power delay controlled zero sensitive sense amplifier Grant 7,130,236 - Rajwani , et al. October 31, 2 | 2006-10-31 |
| Low Power Delay Controlled Zero Sensitive Sense Amplifier App 20060209606 - Rajwani; Iqbal ; et al. | 2006-09-21 |
| Reducing power consumption in a sequential cache App 20060143382 - Damaraju; Satish ; et al. | 2006-06-29 |
| Low power cache architecture App 20050097277 - Maiyuran, Subramaniam J. ; et al. | 2005-05-05 |
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