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Patent applications and USPTO patent grants for Dallenbach; Lukas.The latest application filed is for "managing feedthrough wiring for integrated circuits".
Patent | Date |
---|---|
Managing feedthrough wiring for integrated circuits Grant 10,747,934 - Lind , et al. A | 2020-08-18 |
Placement and timing aware wire tagging Grant 10,719,654 - Beck , et al. | 2020-07-21 |
Managing Feedthrough Wiring For Integrated Circuits App 20200167441 - Lind; Kurt ;   et al. | 2020-05-28 |
Enabling automatic staging for nets or net groups with VHDL attributes Grant 10,572,618 - Beck , et al. Feb | 2020-02-25 |
Placement And Timing Aware Wire Tagging App 20190163862 - Beck; Manuel ;   et al. | 2019-05-30 |
Enabling Automatic Staging For Nets Or Net Groups With Vhdl Attributes App 20190163854 - Beck; Manuel ;   et al. | 2019-05-30 |
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