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name:-0.018764972686768
name:-0.01655387878418
name:-0.0046989917755127
Dai; Vito Patent Filings

Dai; Vito

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dai; Vito.The latest application filed is for "design and optimization of physical cell placement for integrated circuits".

Company Profile
5.20.19
  • Dai; Vito - Santa Clara CA
  • - Santa Clara CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Design And Optimization Of Physical Cell Placement For Integrated Circuits
App 20210124865 - Dai; Vito ;   et al.
2021-04-29
And optimization of physical cell placement
Grant 10,936,778 - Dai , et al. March 2, 2
2021-03-02
Integrated circuit design systems and methods
Grant 10,339,254 - Dai , et al.
2019-07-02
Design And Optimization Of Physical Cell Placement
App 20190080036 - Dai; Vito ;   et al.
2019-03-14
Integrated Circuit Design Systems And Methods
App 20180247006 - Dai; Vito ;   et al.
2018-08-30
Integrated circuit design systems and methods
Grant 9,959,380 - Dai , et al. May 1, 2
2018-05-01
Integrated Circuit Design Systems And Methods
App 20170277818 - Dai; Vito ;   et al.
2017-09-28
Methods for fabricating integrated circuits including generating photomasks for directed self-assembly
Grant 9,170,501 - Latypov , et al. October 27, 2
2015-10-27
Pattern Matching For Predicting Defect Limited Yield
App 20150286763 - WANG; Lynn ;   et al.
2015-10-08
Design-for-manufacturing--design-enabled-manufacturing (DFM-DEM) proactive integrated manufacturing flow
Grant 9,081,919 - Dai , et al. July 14, 2
2015-07-14
Methods For Fabricating Integrated Circuits Including Generating E-beam Patterns For Directed Self-assembly
App 20150126032 - Latypov; Azat ;   et al.
2015-05-07
Methods for fabricating integrated circuits including generating e-beam patterns for directed self-assembly
Grant 9,023,730 - Latypov , et al. May 5, 2
2015-05-05
Metal layer enabling directed self-assembly semiconductor layout designs
Grant 9,012,270 - Xu , et al. April 21, 2
2015-04-21
Methods for fabricating integrated circuits including generating photomasks for directed self-assembly
Grant 9,009,634 - Latypov , et al. April 14, 2
2015-04-14
Methods For Fabricating Integrated Circuits Including Generating Photomasks For Directed Self-assembly
App 20150012897 - Latypov; Azat ;   et al.
2015-01-08
Methods For Fabricating Integrated Circuits Including Generating Photomasks For Directed Self-assembly
App 20150012896 - Latypov; Azat ;   et al.
2015-01-08
Automated design layout pattern correction based on context-aware patterns
Grant 08924896 -
2014-12-30
Automated design layout pattern correction based on context-aware patterns
Grant 8,924,896 - Wang , et al. December 30, 2
2014-12-30
Methods involving pattern matching to identify and resolve potential non-double-patterning-compliant patterns in double patterning applications
Grant 8,910,090 - Wang , et al. December 9, 2
2014-12-09
Layout pattern correction for integrated circuits
Grant 8,898,606 - Abou Ghaida , et al. November 25, 2
2014-11-25
Metal Layer Enabling Directed Self-assembly Semiconductor Layout Designs
App 20140264461 - XU; Ji ;   et al.
2014-09-18
Design-for-manufacturing - Design-enabled-manufacturing (dfm-dem) Proactive Integrated Manufacturing Flow
App 20140282288 - DAI; Vito ;   et al.
2014-09-18
Methods Involving Pattern Matching To Identify And Resolve Potential Non-double-patterning-compliant Patterns In Double Patterning Applications
App 20140245238 - Wang; Lynn T. ;   et al.
2014-08-28
Automated Design Layout Pattern Correction Based On Context-aware Patterns
App 20140215415 - WANG; Lynn ;   et al.
2014-07-31
Methods for decomposing circuit design layouts and for fabricating semiconductor devices using decomposed patterns
Grant 8,555,215 - Zou , et al. October 8, 2
2013-10-08
Methods For Decomposing Circuit Design Layouts And For Fabricating Semiconductor Devices Using Decomposed Patterns
App 20130219347 - Zou; Yi ;   et al.
2013-08-22
Method and apparatus for pattern adjusted timing via pattern matching
Grant 8,453,089 - Teoh , et al. May 28, 2
2013-05-28
Methods for pattern matching in a double patterning technology-compliant physical design flow
Grant 8,418,105 - Wang , et al. April 9, 2
2013-04-09
Method And Apparatus For Pattern Adjusted Timing Via Pattern Matching
App 20130086542 - Teoh; Kah Ching Edward ;   et al.
2013-04-04
Design rules checking augmented with pattern matching
Grant 7,757,190 - Dai , et al. July 13, 2
2010-07-13
Design Rules Checking Augmented With Pattern Matching
App 20080148211 - Dai; Vito ;   et al.
2008-06-19

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