Daga; Bharat K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Daga; Bharat K..The latest application filed is for "efficient storage of memory version data".

Company Profile

0.11.8

Daga; Bharat K. - Fremont CA US
Daga; Bharat K. - Bangalore N/A IN
Daga; Bharat K. - Framont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Efficient interleaving between a non-power-of-two number of entities Grant 8,886,898 - Cypher , et al. November 11, 2	2014-11-11
Efficient storage of memory version data Grant 8,756,363 - Radovic , et al. June 17, 2	2014-06-17
Memory system that supports probalistic component-failure correction with partial-component sparing Grant 8,621,290 - Daga , et al. December 31, 2	2013-12-31
Bandwidth-efficient directory-based coherence protocol Grant 8,516,199 - Cypher , et al. August 20, 2	2013-08-20
Efficient Storage Of Memory Version Data App 20130013843 - Radovic; Zoran ; et al.	2013-01-10
Memory system that provides guaranteed component-failure correction with double-error correction Grant 8,335,976 - Daga , et al. December 18, 2	2012-12-18
Facilitating error detection and correction after a memory component failure Grant 8,255,741 - Cypher , et al. August 28, 2	2012-08-28
Memory System That Provides Guaranteed Component-failure Correction With Double-error Correction App 20110289381 - Daga; Bharat K. ; et al.	2011-11-24
Memory System That Supports Probalistic Component-failure Correction With Partial-component Sparing App 20110289368 - Daga; Bharat K. ; et al.	2011-11-24
Efficient Interleaving Between A Non-power-of-two Number Of Entities App 20110047346 - Cypher; Robert E. ; et al.	2011-02-24
Facilitating Error Detection And Correction After A Memory Component Failure App 20100332944 - Cypher; Robert E. ; et al.	2010-12-30
Bandwidth-efficient Directory-based Coherence Protocol App 20100241814 - Cypher; Robert E. ; et al.	2010-09-23
Methods And Apparatuses For Reducing Power Consumption Of Fully-buffered Dual Inline Memory Modules App 20100077240 - Daga; Bharat K. ; et al.	2010-03-25
Generating a clock crossing signal based on clock ratios Grant 7,627,065 - Schulz , et al. December 1, 2	2009-12-01
Generating a clock crossing signal based on clock ratios App 20070140394 - Schulz; Jurgen M. ; et al.	2007-06-21

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