D'Sa; Reynold V.

Patent Applications and Registrations

Patent applications and USPTO patent grants for D'Sa; Reynold V..The latest application filed is for "method and apparatus for performing sequential executions of elements in cooperation with a transform".

Company Profile

0.11.1

D'Sa; Reynold V. - Portland OR
D'Sa; Reynold V. - Aloha OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Detection, recovery and prevention of bogus branches Grant 7,334,115 - D'Sa , et al. February 19, 2	2008-02-19
Method and apparatus for performing sequential executions of elements in cooperation with a transform App 20040088525 - D'Sa, Reynold V. ; et al.	2004-05-06
Method and apparatus for performing sequential executions of elements in cooperation with a transform Grant 6,715,064 - D'Sa , et al. March 30, 2	2004-03-30
Recovery from writeback stage event signal or micro-branch misprediction using instruction sequence number indexed state information table Grant 6,493,821 - D'Sa , et al. December 10, 2	2002-12-10
System and method of maintaining and utilizing multiple return stack buffers Grant 6,374,350 - D'Sa , et al. April 16, 2	2002-04-16
System and method of maintaining and utilizing multiple return stack buffers Grant 6,151,671 - D'Sa , et al. November 21, 2	2000-11-21
System and method for processing a plurality of branch instructions by a plurality of storage devices and pipeline units Grant 6,055,630 - D'Sa , et al. April 25, 2	2000-04-25
Method and apparatus for implementing a branch target buffer in CISC processor Grant 5,903,751 - Hoyt , et al. May 11, 1	1999-05-11
Dual prediction branch system having two step of branch recovery process which activated only when mispredicted branch is the oldest instruction in the out-of-order unit Grant 5,812,839 - Hoyt , et al. September 22, 1	1998-09-22
Method and apparatus for implementing a set-associative branch target buffer Grant 5,706,492 - Hoyt , et al. January 6, 1	1998-01-06
Method and apparatus for resolving return from subroutine instructions in a computer processor Grant 5,604,877 - Hoyt , et al. February 18, 1	1997-02-18
Method and apparatus for implementing a set-associative branch target buffer Grant 5,574,871 - Hoyt , et al. November 12, 1	1996-11-12

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