loadpatents
name:-0.0023159980773926
name:-0.02636194229126
name:-0.00052309036254883
D'Arrigo; Sebastiano Patent Filings

D'Arrigo; Sebastiano

Patent Applications and Registrations

Patent applications and USPTO patent grants for D'Arrigo; Sebastiano.The latest application filed is for "integrated circuit wireless tagging".

Company Profile
0.23.1
  • D'Arrigo; Sebastiano - Cannes FR
  • D'Arrigo; Sebastiano - Houston TX
  • D'Arrigo; Sebastiano - Sedriano IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated circuit wireless tagging
Grant 6,525,410 - Gelsomini , et al. February 25, 2
2003-02-25
Integrated circuit wireless tagging
App 20010008296 - Gelsomini, Tito ;   et al.
2001-07-19
Flash EEPROM array with P-tank insulated from substrate by deep N-tank
Grant 5,504,708 - Santin , et al. April 2, 1
1996-04-02
Wordline driver circuit for EEPROM memory cell
Grant 5,265,052 - D'Arrigo , et al. November 23, 1
1993-11-23
Method of manufacturing an EEPROM with trench-isolated bitlines
Grant 5,173,436 - Gill , et al. December 22, 1
1992-12-22
Negative-voltage charge pump with feedback control
Grant 5,168,174 - Naso , et al. December 1, 1
1992-12-01
Level-shifter circuit for integrated circuits
Grant 5,157,281 - Santin , et al. October 20, 1
1992-10-20
Fabricating an electrically-erasable, electrically-programmable read-only memory having a tunnel window insulator and thick oxide isolation between wordlines
Grant 5,156,991 - Gill , et al. * October 20, 1
1992-10-20
Nonvolatile memory cell with field-plate switch
Grant 5,134,449 - Gill , et al. July 28, 1
1992-07-28
Electrically-erasable, electrically-programmable read-only memory cell
Grant 5,017,980 - Gill , et al. May 21, 1
1991-05-21
Electrically-erasable, electrically-programmable read-only memory
Grant 5,012,307 - Gill , et al. April 30, 1
1991-04-30
Electrically programmable and erasable memory cells with field plate conductor defined drain regions
Grant 4,947,222 - Gill , et al. August 7, 1
1990-08-07
EEPROM memory cell and driving circuitry
Grant 4,939,558 - Smayling , et al. July 3, 1
1990-07-03
Driving circuitry for EEPROM memory cell
Grant 4,823,318 - D'Arrigo , et al. April 18, 1
1989-04-18
Electrically programmable fuse circuit for an integrated-circuit chip
Grant 4,823,320 - Smayling , et al. April 18, 1
1989-04-18
EEPROM memory cell and driving circuitry
Grant 4,804,637 - Smayling , et al. February 14, 1
1989-02-14
EEPROM memory cell having improved breakdown characteristics and driving circuitry therefor
Grant 4,742,492 - Smayling , et al. May 3, 1
1988-05-03
Method of forming a field plate in a high voltage array
Grant 4,736,342 - Imondi , et al. April 5, 1
1988-04-05
Method and circuit for trimming the frequency of an oscillator
Grant 4,723,114 - D'Arrigo , et al. February 2, 1
1988-02-02
Power-up control circuit including a comparator, Schmitt trigger, and latch
Grant 4,716,322 - D'Arrigo , et al. December 29, 1
1987-12-29
High voltage pulse detector with controllable current consumption
Grant 4,706,011 - Vergara , et al. November 10, 1
1987-11-10
Process for making a lateral bipolar transistor in a standard CSAG process
Grant 4,669,177 - D'Arrigo , et al. June 2, 1
1987-06-02
Integrated circuit oscillator
Grant 4,652,837 - D'Arrigo , et al. March 24, 1
1987-03-24
Protective device for a power element of an integrated circuit
Grant 4,074,334 - D'Arrigo , et al. February 14, 1
1978-02-14

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