Czagas; Joseph A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Czagas; Joseph A..The latest application filed is for "method of forming an integrated circuit having a device wafer with a diffused doped backside layer".

Company Profile

0.7.6

Czagas; Joseph A. - Palm Bay FL

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of forming an integrated circuit having a device wafer with a diffused doped backside layer Grant 7,605,052 - Czagas , et al. October 20, 2	2009-10-20
Method Of Forming An Integrated Circuit Having A Device Wafer With A Diffused Doped Backside Layer App 20080026595 - Czagas; Joseph A. ; et al.	2008-01-31
Integrated circuit having a device wafer with a diffused doped backside layer Grant 7,285,475 - Czagas , et al. October 23, 2	2007-10-23
Line modeling tool Grant 7,110,933 - Lowther , et al. September 19, 2	2006-09-19
Integrated circuit having a device wafer with a diffused doped backside layer App 20060009007 - Czagas; Joseph A. ; et al.	2006-01-12
Integrated circuit having a device wafer with a diffused doped backside layer Grant 6,946,364 - Czagas , et al. September 20, 2	2005-09-20
Integrated circuit having a device wafer with a diffused doped backside layer Grant 6,867,495 - Czagas , et al. March 15, 2	2005-03-15
Line modeling tool App 20050027502 - Lowther, Rex E. ; et al.	2005-02-03
Integrated circuit having a device wafer with a diffused doped backside layer App 20040161905 - Czagas, Joseph A. ; et al.	2004-08-19
Highly linear integrated resistive contact Grant 6,667,523 - Woodbury , et al. December 23, 2	2003-12-23
Co-patterning thin-film resistors of different compositions with a conductive hard mask and method for same Grant 6,441,447 - Czagas , et al. August 27, 2	2002-08-27
Highly linear integrated resistive contact App 20020109230 - Woodbury, Dustin A. ; et al.	2002-08-15
Integrated circuit having a device wafer with a diffused doped backside layer App 20020072200 - Czagas, Joseph A. ; et al.	2002-06-13

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