Currin; Jeffrey D.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Currin; Jeffrey D..The latest application filed is for "system for linearizing a programmable delay circuit".
- Currin; Jeffrey D. - Pleasanton CA
| Patent | Date |
|---|---|
| System for linearizing a programmable delay circuit Grant 6,330,197 - Currin , et al. December 11, 2 | 2001-12-11 |
| Integrated circuit tester with compensation for leakage current Grant 6,194,911 - Currin , et al. February 27, 2 | 2001-02-27 |
| Calibratable programmable phase shifter Grant 6,104,223 - Chapman , et al. August 15, 2 | 2000-08-15 |
| Integrated circuit tester with test head including regulating capacitor Grant 6,087,843 - Pun , et al. July 11, 2 | 2000-07-11 |
| Coherent switching power for an analog circuit tester Grant 5,883,523 - Ferland , et al. March 16, 1 | 1999-03-16 |
| Compensated delay locked loop timing vernier Grant 5,684,421 - Chapman , et al. November 4, 1 | 1997-11-04 |
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