Curd; Derek R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Curd; Derek R..The latest application filed is for "reconfiguration of a programmable logic device using internal control".

Company Profile

0.17.3

Curd; Derek R. - Longmont CO
Curd; Derek R. - San Jose CA
Curd; Derek R. - Woodside CA
Curd; Derek R. - Fremont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Reconfiguration of a programmable logic device using internal control Grant 7,227,378 - Blodget , et al. June 5, 2	2007-06-05
FPGA configuration memory with built-in error correction mechanism Grant 7,143,329 - Trimberger , et al. November 28, 2	2006-11-28
Reconfiguration of a programmable logic device using internal control App 20050193358 - Blodget, Brandon J. ; et al.	2005-09-01
Reconfiguration of a programmable logic device using internal control Grant 6,920,627 - Blodget , et al. July 19, 2	2005-07-19
Partial reconfiguration of a programmable logic device using an on-chip processor Grant 6,907,595 - Curd , et al. June 14, 2	2005-06-14
Partial reconfiguration of a programmable logic device using an on-chip processor App 20040113655 - Curd, Derek R. ; et al.	2004-06-17
Reconfiguration of a programmable logic device using internal control App 20040117755 - Blodget, Brandon J. ; et al.	2004-06-17
Boundary-scan register cell with bypass circuit Grant 6,314,539 - Jacobson , et al. November 6, 2	2001-11-06
Method of minimizing power use in programmable logic devices Grant 6,172,518 - Jenkins, IV. , et al. January 9, 2	2001-01-09
Low-voltage input/output circuit with high voltage tolerance Grant 6,121,795 - Curd , et al. September 19, 2	2000-09-19
Efficient in-system programming structure and method for non-volatile programmable logic devices Grant 5,949,987 - Curd , et al. September 7, 1	1999-09-07
Method and apparatus for selecting optimum levels for in-system programmable charge pumps Grant 5,889,701 - Kang , et al. March 30, 1	1999-03-30
On-chip programming verification system for PLDs Grant 5,841,867 - Jacobson , et al. November 24, 1	1998-11-24
Overridable data protection mechanism for PLDs Grant 5,838,901 - Curd , et al. November 17, 1	1998-11-17
Voltage regulator with charge pump and parallel reference nodes Grant 5,831,845 - Zhou , et al. November 3, 1	1998-11-03
Configurable performance-optimized programmable logic device Grant 5,801,548 - Lee , et al. September 1, 1	1998-09-01
Circuit for partially reprogramming an operational programmable logic device Grant 5,764,076 - Lee , et al. June 9, 1	1998-06-09
Efficient in-system programming structure and method for non-volatile programmable logic devices Grant 5,734,868 - Curd , et al. March 31, 1	1998-03-31
Reset circuit for a programmable logic device Grant 5,689,516 - Mack , et al. November 18, 1	1997-11-18
Programmable logic device with configurable power supply Grant 5,661,685 - Lee , et al. August 26, 1	1997-08-26

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