Curcio; Brian E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Curcio; Brian E..The latest application filed is for "electrostatic ink compositions, methods and print substrates".

Company Profile

0.20.17

Curcio; Brian E. - San Diego CA
Curcio; Brian E. - Binghamton NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Electrostatic ink compositions, methods and print substrates Grant 9,798,259 - Kabalnov , et al. October 24, 2	2017-10-24
Electrostatic Ink Compositions, Methods And Print Substrates App 20150323879 - Kabalnov; Alexey S. ; et al.	2015-11-12
Inkjet pen/printhead with shipping fluid Grant 8,596,746 - Curcio , et al. December 3, 2	2013-12-03
Method for improving gloss of a print Grant 8,474,934 - Curcio , et al. July 2, 2	2013-07-02
Method of printing images Grant 8,356,878 - Iu , et al. January 22, 2	2013-01-22
Method Of Printing Images App 20120293574 - Iu; Kai-Kong ; et al.	2012-11-22
Methods, apparatus and articles of manufacture to control gloss quality Grant 8,267,498 - Blair , et al. September 18, 2	2012-09-18
Inkjet Pen/printhead With Shipping Fluid App 20110310181 - Curcio; Brian E. ; et al.	2011-12-22
Purging fluid from fluid-ejection nozzles by performing spit-wipe operations Grant 7,914,110 - Curcio , et al. March 29, 2	2011-03-29
Purging fluid from fluid-ejection nozzles by performing spit-wipe operations App 20090073219 - Curcio; Brian E. ; et al.	2009-03-19
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements Grant 7,402,254 - Curcio , et al. July 22, 2	2008-07-22
Method for producing Z-axis interconnection assembly of printed wiring board elements Grant 7,303,639 - Curcio , et al. December 4, 2	2007-12-04
Solid via layer to layer interconnect Grant 7,076,869 - Curcio , et al. July 18, 2	2006-07-18
Method for producing Z-axis interconnection assembly of printed wiring board elements App 20050280136 - Curcio, Brian E. ; et al.	2005-12-22
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements Grant 6,969,436 - Curcio , et al. November 29, 2	2005-11-29
Method and structure for small pitch z-axis electrical interconnections Grant 6,955,849 - Curcio , et al. October 18, 2	2005-10-18
Method and structure for small pitch z-axis electrical interconnections App 20050008833 - Curcio, Brian E. ; et al.	2005-01-13
Method and structure for small pitch z-axis electrical interconnections Grant 6,790,305 - Curcio , et al. September 14, 2	2004-09-14
Process of removing holefill residue from a metallic surface of an electronic substrate Grant 6,776,852 - Boyko , et al. August 17, 2	2004-08-17
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements App 20040084137 - Curcio, Brian E. ; et al.	2004-05-06
Method and structure for small pitch z-axis electrical interconnections App 20040067347 - Curcio, Brian E. ; et al.	2004-04-08
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements App 20040052945 - Curcio, Brian E. ; et al.	2004-03-18
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements Grant 6,645,607 - Curcio , et al. November 11, 2	2003-11-11
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements Grant 6,638,607 - Curcio , et al. October 28, 2	2003-10-28
Method of forming metallic z-interconnects for laminate chip packages and boards Grant 6,634,543 - Curcio , et al. October 21, 2	2003-10-21
Process of removing holefill residue from a metallic surface of an electronic substrate App 20030131870 - Boyko, Christina M. ; et al.	2003-07-17
Method of forming metallic z-interconnects for laminate chip packages and boards App 20030127495 - Curcio, Brian E. ; et al.	2003-07-10
Method of joining laminates for z-axis interconnection App 20030041966 - Casey, Jon A. ; et al.	2003-03-06
Solid via layer to layer interconnect App 20030035272 - Curcio, Brian E. ; et al.	2003-02-20
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements App 20020192444 - Curcio, Brian E. ; et al.	2002-12-19
Solid Via Layer To Layer Interconnect App 20020179334 - Curcio, Brian E. ; et al.	2002-12-05
Method And Structure For Producing Z-axis Interconnection Assembly Of Printed Wiring Board Elements App 20020150741 - Curcio, Brian E. ; et al.	2002-10-17
Method and structure for producing Z-axis interconnection assembly of printed wiring board elements Grant 6,465,084 - Curcio , et al. October 15, 2	2002-10-15
Method for filling high aspect ratio via holes in electronic substrates and the resulting holes App 20010027842 - Curcio, Brian E. ; et al.	2001-10-11

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