loadpatents
name:-0.008479118347168
name:-0.011714220046997
name:-0.00050497055053711
Cunningham; Paul Alexander Patent Filings

Cunningham; Paul Alexander

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cunningham; Paul Alexander.The latest application filed is for "generation of improved input function for clocked element in synchronous circuit".

Company Profile
0.12.7
  • Cunningham; Paul Alexander - Mountain View CA
  • Cunningham; Paul Alexander - Cambridge GB
  • Cunningham; Paul Alexander - Milton GB
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and system for construction of a highly efficient and predictable sequential test decompression logic
Grant 9,817,069 - Wilcox , et al. November 14, 2
2017-11-14
Method and system for improving efficiency of sequential test compression using overscan
Grant 9,817,068 - Chickermane , et al. November 14, 2
2017-11-14
Method and system for improving efficiency of XOR-based test compression using an embedded serializer-deserializer
Grant 9,606,179 - Cunningham , et al. March 28, 2
2017-03-28
Method for using XOR trees for physically efficient scan compression and decompression logic
Grant 9,513,335 - Wilcox , et al. December 6, 2
2016-12-06
Elastic compression-optimizing tester bandwidth with compressed test stimuli using overscan and variable serialization
Grant 9,470,754 - Chickermane , et al. October 18, 2
2016-10-18
Method for using sequential decompression logic for VLSI test in a physically efficient construction
Grant 9,470,756 - Wilcox , et al. October 18, 2
2016-10-18
Method for dividing testable logic into a two-dimensional grid for physically efficient scan
Grant 9,470,755 - Foutz , et al. October 18, 2
2016-10-18
Generation of clock gating function for synchronous circuit
Grant 7,194,708 - Wilcox , et al. March 20, 2
2007-03-20
Clocked gating based on measured performance
Grant 7,131,090 - Wilcox , et al. October 31, 2
2006-10-31
Clock gating for synchronous circuits
Grant 7,095,251 - Wilcox , et al. August 22, 2
2006-08-22
Method of designing and making an integrated circuit
Grant 6,976,232 - Cunningham , et al. December 13, 2
2005-12-13
Control of guard-flops
Grant 6,831,482 - Cunningham , et al. December 14, 2
2004-12-14
Generation of improved input function for clocked element in synchronous circuit
App 20040230923 - Wilcox, Stephen Paul ;   et al.
2004-11-18
Generation of clock gating function for synchronous circuit
App 20040153981 - Wilcox, Stephen Paul ;   et al.
2004-08-05
Clock gating for synchronous circuits
App 20040150427 - Wilcox, Stephen Paul ;   et al.
2004-08-05
Clock gating for hierarchical structure
App 20040153977 - Wilcox, Stephen Paul ;   et al.
2004-08-05
Clocked gating based on measured performance
App 20040153980 - Wilcox, Stephen Paul ;   et al.
2004-08-05
Method of designing and making an integrated circuit
App 20040015790 - Cunningham, Paul Alexander ;   et al.
2004-01-22
Control of guard-flops
App 20040004504 - Cunningham, Paul Alexander ;   et al.
2004-01-08

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