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Binding a memory window to a queue pair App 20040193825 - Garcia, David J. ;   et al. | 2004-09-30 |
Queue pair/window association App 20040193908 - Garcia, David J. ;   et al. | 2004-09-30 |
Physical mode addressing App 20040193833 - Hampton, Kathryn ;   et al. | 2004-09-30 |
Processor based system with system wide reset and partial system reset capabilities Grant 6,463,529 - Miller , et al. October 8, 2 | 2002-10-08 |
Circuit and method employing feedback for driving a clocking signal to compensate for load-induced skew Grant 6,182,236 - Culley , et al. January 30, 2 | 2001-01-30 |
Computer diagnostic board that provides system monitoring and permits remote terminal access Grant 6,070,253 - Tavallaei , et al. May 30, 2 | 2000-05-30 |
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Method and apparatus for identifying faulty devices in a computer system Grant 6,032,271 - Goodrum , et al. February 29, 2 | 2000-02-29 |
Data error detection and correction Grant 6,024,486 - Olarig , et al. February 15, 2 | 2000-02-15 |
Double buffering operations between the memory bus and the expansion bus of a computer system Grant 6,018,620 - Culley , et al. January 25, 2 | 2000-01-25 |
Method and apparatus for diagnosing fault states in a computer system Grant 6,000,040 - Culley , et al. December 7, 1 | 1999-12-07 |
Bus arbitration Grant 5,872,939 - Ramsey , et al. February 16, 1 | 1999-02-16 |
Providing data from a bridge to a requesting device while the bridge is receiving the data Grant 5,872,941 - Goodrum , et al. February 16, 1 | 1999-02-16 |
Double buffering operations between the memory bus and the expansion bus of a computer system Grant 5,870,568 - Culley , et al. February 9, 1 | 1999-02-09 |
Multi-processor system with system wide reset and partial system reset capabilities Grant 5,870,602 - Miller , et al. February 9, 1 | 1999-02-09 |
Synchronizing data between devices Grant 5,822,571 - Goodrum , et al. October 13, 1 | 1998-10-13 |
Computer system bus performance monitoring Grant 5,819,053 - Goodrum , et al. October 6, 1 | 1998-10-06 |
Method and apparatus for independently resetting processors and cache controllers in multiple processor systems Grant 5,737,604 - Miller , et al. April 7, 1 | 1998-04-07 |
Split transactions and pipelined arbitration of microprocessors in multiprocessing computer systems Grant 5,553,310 - Taylor , et al. September 3, 1 | 1996-09-03 |
System for awarding the highest priority to a microprocessor releasing a system bus after aborting a locked cycle upon detecting a locked retry signal Grant 5,553,248 - Melo , et al. September 3, 1 | 1996-09-03 |
Double buffering operations between the memory bus and the expansion bus of a computer system Grant 5,519,839 - Culley , et al. May 21, 1 | 1996-05-21 |
Method and apparatus for independently resetting processors and cache controllers in multiple processor systems Grant 5,465,360 - Miller , et al. November 7, 1 | 1995-11-07 |
Extended duration high resolution timer contained in two integrated circuits and having alternating data sequences provided from different integrated circuits Grant 5,463,761 - Culley October 31, 1 | 1995-10-31 |
Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system Grant 5,437,042 - Culley , et al. July 25, 1 | 1995-07-25 |
Method of and apparatus for correcting edge placement errors in multiplying phase locked loop circuits Grant 5,406,590 - Miller , et al. April 11, 1 | 1995-04-11 |
Two level system bus arbitration having lower priority multiprocessor arbitration and higher priority in a single processor and a plurality of bus masters arbitration Grant 5,392,436 - Jansen , et al. February 21, 1 | 1995-02-21 |
Apparatus for strictly ordered input/output operations for interrupt system integrity Grant 5,367,689 - Mayer , et al. November 22, 1 | 1994-11-22 |
Memory accessing system with an interface and memory selection unit utilizing write protect and strobe signals Grant 5,341,494 - Thayer , et al. August 23, 1 | 1994-08-23 |
Paged memory controller Grant 5,303,364 - Mayer , et al. April 12, 1 | 1994-04-12 |
Interrupt handling in an asymmetric multiprocessor computer system Grant 5,247,685 - Landry , et al. September 21, 1 | 1993-09-21 |
Full address and odd boundary direct memory access controller which determines address size by counting the input address bytes Grant 5,214,767 - Wanner , et al. May 25, 1 | 1993-05-25 |
Noncacheable address random access memory Grant 5,210,847 - Thome , et al. May 11, 1 | 1993-05-11 |
Delaying arbitration of bus access in digital computers Grant 5,168,568 - Thayer , et al. December 1, 1 | 1992-12-01 |
System for controlling the transferring of different widths of data using two different sets of address control signals Grant 5,165,037 - Culley November 17, 1 | 1992-11-17 |
Enhanced locked bus cycle control in a cache memory computer system Grant 5,163,143 - Culley , et al. November 10, 1 | 1992-11-10 |
Computer system with high speed data transfer capabilities Grant 5,159,679 - Culley October 27, 1 | 1992-10-27 |
System for fast selection of non-cacheable address ranges using programmed array logic Grant 5,157,774 - Culley * October 20, 1 | 1992-10-20 |
Computer system speed control at continuous processor speed Grant 5,125,088 - Culley June 23, 1 | 1992-06-23 |
Programmable interrupt controller Grant 5,101,497 - Culley , et al. March 31, 1 | 1992-03-31 |
Cache flush request circuit flushes the cache if input/output space write operation and circuit board response are occurring concurrently Grant 5,095,428 - Walker , et al. March 10, 1 | 1992-03-10 |
System for fast selection of non-cacheable address ranges using programmed array logic Grant 5,091,850 - Culley February 25, 1 | 1992-02-25 |
Apparatus for determining maximum usable memory size Grant 5,027,313 - Culley June 25, 1 | 1991-06-25 |
Extended input/output circuit board addressing system Grant 4,999,805 - Culley , et al. March 12, 1 | 1991-03-12 |
Personal computer having normal and high speed execution modes Grant 4,835,681 - Culley * May 30, 1 | 1989-05-30 |
Priority arbitration circuit for processor access Grant 4,787,032 - Culley November 22, 1 | 1988-11-22 |
Personal computer having normal and high speed execution modes Grant 4,727,491 - Culley February 23, 1 | 1988-02-23 |
Video display controller system with attribute latch Grant 4,646,077 - Culley February 24, 1 | 1987-02-24 |
Pulse width modulation of printhead voltage Grant 4,594,501 - Culley , et al. June 10, 1 | 1986-06-10 |