Crawford; John H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Crawford; John H..The latest application filed is for "techniques for probabilistic dynamic random access memory row repair".

Company Profile

0.43.39

Crawford; John H. - Saratoga CA
Crawford; John H. - Saratogo CA
Crawford; John H. - Santa Clara CA
Crawford; John H. - Sunnyvale CA
Crawford, John H. - Los Gatos CA
Crawford; John H. - Corvallis OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Techniques for probabilistic dynamic random access memory row repair Grant 10,102,886 - Crawford , et al. October 16, 2	2018-10-16
Mapping a physical address differently to different memory devices in a group Grant 9,934,143 - Bains , et al. April 3, 2	2018-04-03
Refresh parameter-dependent memory refresh management Grant 9,910,604 - Crawford , et al. March 6, 2	2018-03-06
Managing power consumption and performance of computing systems Grant 9,857,858 - Bodas , et al. January 2, 2	2018-01-02
Techniques for determining victim row addresses in a volatile memory Grant 9,824,754 - Mandava , et al. November 21, 2	2017-11-21
PCIE device power state control Grant 9,778,720 - Kumar , et al. October 3, 2	2017-10-03
Techniques for Probabilistic Dynamic Random Access Memory Row Repair App 20170103795 - Crawford; John H. ; et al.	2017-04-13
Memory Refresh Management App 20170024148 - Crawford; John H. ; et al.	2017-01-26
Managing the operation of a computing device by determining performance-power states Grant 9,524,009 - Bodas , et al. December 20, 2	2016-12-20
Techniques for probabilistic dynamic random access memory row repair Grant 9,449,671 - Crawford , et al. September 20, 2	2016-09-20
Techniques for Determining Victim Row Addresses in a Volatile Memory App 20160224262 - MANDAVA; SREENIVAS ; et al.	2016-08-04
Synchronizing multiple threads efficiently Grant 9,405,595 - Kottapalli , et al. August 2, 2	2016-08-02
Techniques for determining victim row addresses in a volatile memory Grant 9,269,436 - Mandava , et al. February 23, 2	2016-02-23
Memory refresh management Grant 9,269,417 - Crawford , et al. February 23, 2	2016-02-23
Periodic activity alignment Grant 9,213,390 - Gorbatov , et al. December 15, 2	2015-12-15
Managing Power Consumption And Performance Of Computing Systems App 20150169026 - Bodas; Devadatta V. ; et al.	2015-06-18
Mapping A Physical Address Differently To Different Memory Devices In A Group App 20150089183 - BAINS; KULJIT S. ; et al.	2015-03-26
Synchronizing Multiple Threads Efficiently App 20140337857 - Kottapalli; Sailesh ; et al.	2014-11-13
Mechanisms to avoid inefficient core hopping and provide hardware assisted low-power state selection Grant 8,887,171 - Song , et al. November 11, 2	2014-11-11
Pcie Device Power State Control App 20140310550 - Kumar; Anil K. ; et al.	2014-10-16
Techniques for Determining Victim Row Addresses in a Volatile Memory App 20140281207 - Mandava; Sreenivas ; et al.	2014-09-18
Techniques for Probabilistic Dynamic Random Access Memory Row Repair App 20140281206 - Crawford; John H. ; et al.	2014-09-18
Managing The Operation Of A Computing System App 20140281647 - Bodas; Devadatta V. ; et al.	2014-09-18
Synchronizing multiple threads efficiently Grant 8,819,684 - Kottapalli , et al. August 26, 2	2014-08-26
Memory Refresh Management App 20140192605 - Crawford; John H. ; et al.	2014-07-10
Periodic Activity Alignment App 20140189403 - Gorbatov; Eugene ; et al.	2014-07-03
System And Method For Retaining Coherent Cache Contents During Deep Power-down Operations App 20140095801 - BODAS; Devadatta V. ; et al.	2014-04-03
Synchronizing Multiple Threads Efficiently App 20130275995 - Kottapalli; Sailesh ; et al.	2013-10-17
Synchronizing multiple threads efficiently Grant 8,473,963 - Kottapalli , et al. June 25, 2	2013-06-25
Transaction based shared data operations in a multiprocessor environment Grant 8,458,412 - Kottapalli , et al. June 4, 2	2013-06-04
Transaction based shared data operations in a multiprocessor environment Grant 8,176,266 - Kottapalli , et al. May 8, 2	2012-05-08
Transaction Based Shared Data Operations In A Multiprocessor Environment App 20110252203 - Kottapalli; Sailesh ; et al.	2011-10-13
Transaction based shared data operations in a multiprocessor environment Grant 7,984,248 - Kottapalli , et al. July 19, 2	2011-07-19
Synchronizing Multiple Threads Efficiently App 20110173634 - Kottapalli; Sailesh ; et al.	2011-07-14
Mechanisms To Avoid Inefficient Core Hopping And Provide Hardware Assisted Low-power State Selection App 20110161627 - Song; Justin J. ; et al.	2011-06-30
Synchronizing multiple threads efficiently Grant 7,937,709 - Kottapalli , et al. May 3, 2	2011-05-03
Transaction Based Shared Data Operations In A Multiprocessor Environment App 20110055493 - Kottapalli; Sailesh ; et al.	2011-03-03
Tracking health of integrated circuit structures Grant 7,877,666 - Crawford , et al. January 25, 2	2011-01-25
Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches Grant 7,669,009 - Kottapalli , et al. February 23, 2	2010-02-23
Method and apparatus for protecting TLB's VPN from soft errors Grant 7,607,048 - Echeruo , et al. October 20, 2	2009-10-20
Tracking Health Of Integrated Circuit Structures App 20080163014 - Crawford; John H. ; et al.	2008-07-03
Apparatus and method for protecting critical resources against soft errors in high performance microprocessor Grant 7,383,468 - Quach , et al. June 3, 2	2008-06-03
Transaction based shared data operations in a multiprocessor environment App 20060161740 - Kottapalli; Sailesh ; et al.	2006-07-20
Method and apparatus for protecting TLB's VPN from soft errors App 20060150048 - Echeruo; Ugonna C. ; et al.	2006-07-06
Synchronizing multiple threads efficiently App 20060143361 - Kottapalli; Sailesh ; et al.	2006-06-29
Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches App 20060064547 - Kottapalli; Sailesh ; et al.	2006-03-23
Computer system and method for executing interrupt instructions in two operating modes Grant 7,010,671 - Crawford , et al. March 7, 2	2006-03-07
Computer system and method for executing interrupt instructions in operating modes App 20050091480 - Crawford, John H. ; et al.	2005-04-28
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors App 20040139280 - Quach, Nhon T. ; et al.	2004-07-15
Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors App 20040078529 - Quach, Nhon T. ; et al.	2004-04-22
Apparatus and method for protecting critical resources against soft errors in high performance microprocessor App 20040030959 - Quach, Nhon T. ; et al.	2004-02-12
Apparatus and method for protecting critical resources against soft errors in high performance microprocessors Grant 6,654,909 - Quach , et al. November 25, 2	2003-11-25
Virtual memory mapping using region-based page tables Grant 6,604,184 - Zahir , et al. August 5, 2	2003-08-05
Virtual Memory Mapping Using Region-based Page Tables App 20030018876 - ZAHIR, ACHMED R. ; et al.	2003-01-23
Computer system having software interrupt (INTn) instructions selectively operating in a virtual mode App 20020120434 - Crawford, John H. ; et al.	2002-08-29
Computer system and method for executing interrupt instructions in operating modes Grant 6,385,718 - Crawford , et al. May 7, 2	2002-05-07
Emulation of an instruction set on an instruction set architecture transition Grant 6,163,764 - Dulong , et al. December 19, 2	2000-12-19
Apparatus and method for swapping the byte order of a data item to effectuate memory format conversion Grant 5,948,099 - Crawford , et al. September 7, 1	1999-09-07
Virtual memory management method and apparatus utilizing separate and independent segmentation and paging mechanism Grant 5,321,836 - Crawford , et al. June 14, 1	1994-06-14
Method of transferring burst data in a microprocessor Grant 5,255,378 - Crawford , et al. October 19, 1	1993-10-19
Controller for two-way set associative cache Grant 5,210,845 - Crawford , et al. May 11, 1	1993-05-11
System using both a supervisor level control bit and a user level control bit to enable/disable memory reference alignment checking Grant 5,201,043 - Crawford , et al. April 6, 1	1993-04-06
Content addressable memory for microprocessor system Grant 5,173,872 - Crawford , et al. December 22, 1	1992-12-22
Method of transferring burst data in a microprocessor Grant 5,131,083 - Crawford , et al. July 14, 1	1992-07-14
Memory management for microprocessor system Grant 4,972,338 - Crawford , et al. November 20, 1	1990-11-20
Wood burner Grant 4,240,785 - Crawford December 23, 1	1980-12-23