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name:-0.16238713264465
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Cranford, Jr.; Hayden C. Patent Filings

Cranford, Jr.; Hayden C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cranford, Jr.; Hayden C..The latest application filed is for "managing data flow in vcsel-based optical communications system".

Company Profile
4.109.39
  • Cranford, Jr.; Hayden C. - Cary NC
  • Cranford, Jr.; Hayden C - Cary NC
  • Cranford, Jr.; Hayden C - Apex NC
  • Cranford, Jr.; Hayden C. - Apex NC
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Managing data flow in VCSEL-based optical communications system
Grant 10,447,389 - Cranford, Jr. , et al. Oc
2019-10-15
Linear feedback shift register-based clock signal generator, time domain-interleaved analog to digital converter and methods
Grant 10,432,209 - Mikes , et al. O
2019-10-01
Control of VCSEL-based optical communications system
Grant 10,250,010 - Cranford, Jr. , et al.
2019-04-02
Managing Data Flow In Vcsel-based Optical Communications System
App 20190068278 - Cranford, JR.; Hayden C. ;   et al.
2019-02-28
Peaking amplifier frequency tuning
Grant 10,211,790 - Chen , et al. Feb
2019-02-19
Peaking Amplifier Frequency Tuning
App 20180278218 - Chen; Michael ;   et al.
2018-09-27
Phase rotator apparatus
Grant 10,075,174 - Bucossi , et al. September 11, 2
2018-09-11
Peaking amplifier frequency tuning
Grant 10,033,334 - Chen , et al. July 24, 2
2018-07-24
Peaking amplifier frequency tuning
Grant 9,960,738 - Chen , et al. May 1, 2
2018-05-01
Peaking amplifier frequency tuning
Grant 9,853,612 - Chen , et al. December 26, 2
2017-12-26
System and method to speed up PLL lock time on subsequent calibrations via stored band values
Grant 9,571,111 - Cranford, Jr. , et al. February 14, 2
2017-02-14
Systems for signal detection
Grant 9,235,543 - Cranford, Jr. , et al. January 12, 2
2016-01-12
Power aware equalization in a serial communications link
Grant 9,231,796 - Bulzacchelli , et al. January 5, 2
2016-01-05
Systems and methods for signal detection
Grant 9,213,667 - Cranford, Jr. , et al. December 15, 2
2015-12-15
Testing a decision feedback equalizer (`DFE`)
Grant 9,209,948 - Atwood , et al. December 8, 2
2015-12-08
Power Aware Equalization In A Serial Communications Link
App 20150146768 - Bulzacchelli; John F. ;   et al.
2015-05-28
Testing A Decision Feedback Equalizer ('dfe')
App 20150131707 - ATWOOD; EUGENE R. ;   et al.
2015-05-14
Testing a decision feedback equalizer (`DFE`)
Grant 9,014,254 - Atwood , et al. April 21, 2
2015-04-21
Adaptable receiver detection
Grant 8,989,313 - Bergkvist, Jr. , et al. March 24, 2
2015-03-24
Testing A Decision Feedback Equalizer ('dfe')
App 20140376603 - ATWOOD; EUGENE R. ;   et al.
2014-12-25
Adaptable Receiver Detection
App 20140254650 - Bergkvist, JR.; John J. ;   et al.
2014-09-11
Serial link receiver for handling high speed transmissions
Grant 8,798,204 - Chen , et al. August 5, 2
2014-08-05
Environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodes
Grant 8,793,365 - Arsovski , et al. July 29, 2
2014-07-29
Systems And Methods For Signal Detection
App 20140149627 - Cranford, JR.; Hayden C. ;   et al.
2014-05-29
Systems And Methods For Signal Detection
App 20140149629 - Cranford, JR.; Hayden C. ;   et al.
2014-05-29
Static noise margin monitoring circuit and method
Grant 8,729,908 - Cranford, Jr. , et al. May 20, 2
2014-05-20
Solutions for controlling bulk bias voltage in an extremely thin silicon-on-insulator (ETSOI) integrated circuit chip
Grant 8,653,597 - Cranford, Jr. , et al. February 18, 2
2014-02-18
Static Noise Margin Monitoring Circuit And Method
App 20130221987 - Cranford, JR.; Hayden C. ;   et al.
2013-08-29
Solutions For Controlling Bulk Bias Voltage In An Extremely Thin Silicon-on-insulator (etsoi) Integrated Circuit Chip
App 20130120055 - Cranford, Jr.; Hayden C. ;   et al.
2013-05-16
Solutions for controlling bulk bias voltage in an extremely thin silicon-on-insulator (ETSOI) integrated circuit chip
Grant 8,416,009 - Cranford, Jr. , et al. April 9, 2
2013-04-09
Serial Link Receiver For Handling High Speed Transmissions
App 20130064326 - Chen; Minhan ;   et al.
2013-03-14
Solutions For Controlling Bulk Bias Voltage In An Extremely Thin Silicon-on-insulator (etsoi) Integrated Circuit Chip
App 20130015911 - Cranford, JR.; Hayden C. ;   et al.
2013-01-17
Transmitter bandwidth optimization circuit
Grant 8,219,040 - Hsu , et al. July 10, 2
2012-07-10
Design structure for transmitter bandwidth optimization circuit
Grant 8,219,041 - Hsu , et al. July 10, 2
2012-07-10
Variable gain amplifier with reduced power consumption
Grant 8,183,920 - Qi , et al. May 22, 2
2012-05-22
Variable Gain Amplifier With Reduced Power Consumption
App 20120001691 - Qi; Jieming ;   et al.
2012-01-05
Adaptive noise suppression using a noise look-up table
Grant 8,077,534 - Arsovski , et al. December 13, 2
2011-12-13
Apparatus for transmitting data and additional information simultaneously within a wire-based communication system
Grant 8,054,867 - Cranford, Jr. , et al. November 8, 2
2011-11-08
System and method for balancing delay of signal communication paths through well voltage adjustment
Grant 8,051,340 - Cranford, Jr. , et al. November 1, 2
2011-11-01
Method and systems of powering on integrated circuit
Grant 8,016,482 - Arsovski , et al. September 13, 2
2011-09-13
Receiver termination circuit for a high speed direct current (DC) serial link
Grant 7,995,660 - Cox , et al. August 9, 2
2011-08-09
Systems and arrangements for clock and data recovery in communications
Grant 7,983,368 - Cranford, Jr. , et al. July 19, 2
2011-07-19
Test circuit for serial link receiver
Grant 7,940,846 - Cranford, Jr. , et al. May 10, 2
2011-05-10
Bias circuit for a MOS device
Grant 7,936,208 - Clements , et al. May 3, 2
2011-05-03
Structure for intrinsic RC power distribution for noise filtering of analog supplies
Grant 7,932,774 - Bonaccio , et al. April 26, 2
2011-04-26
System and circuit for determining data signal jitter via asynchronous sampling
Grant 7,930,120 - Cranford, Jr. , et al. April 19, 2
2011-04-19
Systems and arrangements for clock and data recovery in communications
Grant 7,916,820 - Cranford, Jr. , et al. March 29, 2
2011-03-29
Adaptive Common Mode Bias For Differential Amplifier Input Circuits
App 20110057727 - Cranford, JR.; Hayden C. ;   et al.
2011-03-10
Critical path redundant logic for mitigation of hardware across chip variation
Grant 7,898,286 - Arsovski , et al. March 1, 2
2011-03-01
Structure for on-chip electromigration monitoring system
Grant 7,840,916 - Hsu , et al. November 23, 2
2010-11-23
One-sample-per-bit decision feedback equalizer (DFE) clock and data recovery
Grant 7,809,054 - Carballo , et al. October 5, 2
2010-10-05
Environmental And Computing Cost Reduction With Improved Reliability In Workload Assignment To Distributed Computing Nodes
App 20100228861 - Arsovski; Igor ;   et al.
2010-09-09
System and circuit for constructing a synchronous signal diagram from asynchronously sampled data
Grant 7,792,649 - Cranford, Jr. , et al. September 7, 2
2010-09-07
Critical Path Redundant Logic for Mitigation of Hardware Across Chip Variation
App 20100201377 - ARSOVSKI; Igor ;   et al.
2010-08-12
High speed serial link output stage having self adaptation for various impairments
Grant 7,769,057 - Clements , et al. August 3, 2
2010-08-03
Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path
Grant 7,770,139 - Arsovski , et al. August 3, 2
2010-08-03
Intrinsic RC power distribution for noise filtering of analog supplies
Grant 7,755,420 - Bonaccio , et al. July 13, 2
2010-07-13
Method for on-chip diagnostic testing and checking of receiver margins
Grant 7,721,134 - Cranford, Jr. , et al. May 18, 2
2010-05-18
On-chip electromigration monitoring
Grant 7,719,302 - Hsu , et al. May 18, 2
2010-05-18
Design structures of powering on integrated circuit
Grant 7,716,007 - Arsovski , et al. May 11, 2
2010-05-11
Method for manufacturing a calibration device
Grant 7,698,802 - Clements , et al. April 20, 2
2010-04-20
Generating an eye diagram of integrated circuit transmitted signals
Grant 7,684,478 - Cranford, Jr. , et al. March 23, 2
2010-03-23
Using statistical signatures for testing high-speed circuits
Grant 7,661,052 - Cranford, Jr. , et al. February 9, 2
2010-02-09
System And Circuit For Determining Data Signal Jitter Via Asynchronous Sampling
App 20100030503 - Cranford, JR.; Hayden C. ;   et al.
2010-02-04
Bias Circuit For A Mos Device
App 20100026376 - Clements; Steven Mark ;   et al.
2010-02-04
Adaptive Noise Suppression Using a Noise Look-up Table
App 20100031067 - Arsovski; Igor ;   et al.
2010-02-04
Power network reconfiguration using MEM switches
Grant 7,624,289 - Cranford, Jr. , et al. November 24, 2
2009-11-24
Apparatus For Transmitting Data And Additional Information Simultaneously Within A Wire-based Communication System
App 20090201973 - Cranford, JR; Hayden C. ;   et al.
2009-08-13
Impedance calibration for source series terminated serial link transmitter
Grant 7,570,071 - Clements , et al. August 4, 2
2009-08-04
Precision passive circuit structure
Grant 7,566,946 - Coolbaugh , et al. July 28, 2
2009-07-28
Systems and Arrangements to Provide Input Offset Voltage Compensation
App 20090146722 - Chen; Minhan ;   et al.
2009-06-11
CML delay cell with linear rail-to-rail tuning range and constant output swing
Grant 7,541,855 - Cranford, Jr. , et al. June 2, 2
2009-06-02
Overshoot reduction in VCO calibration for serial link phase lock loop (PLL)
Grant 7,539,473 - Cranford, Jr. , et al. May 26, 2
2009-05-26
Structure for transmitter bandwidth optimization circuit
App 20090129485 - Hsu; Louis L. ;   et al.
2009-05-21
Design structure for on-chip electromigration monitoring system
App 20090132985 - Hsu; Louis L. ;   et al.
2009-05-21
Circuit For Providing Automatic Adaptation To Frequency Offsets In High Speed Serial Links
App 20090116593 - CRANFORD, JR.; HAYDEN C. ;   et al.
2009-05-07
Receiver Termination Circuit For A High Speed Direct Current (dc) Serial Link
App 20090110084 - Cox; Carrie E. ;   et al.
2009-04-30
Design Structure for a Flexible Multimode Logic Element For Use In A Configurable Mixed-Logic Signal Distribution Path
App 20090108869 - Arsovski; Igor ;   et al.
2009-04-30
Design structure for a serial link output stage differential amplifier
Grant 7,522,000 - Cox , et al. April 21, 2
2009-04-21
Method and apparatus for generating random jitter
Grant 7,512,177 - Cranford, Jr. , et al. March 31, 2
2009-03-31
Clock distribution network, structure, and method for providing balanced loading in integrated circuit clock trees
Grant 7,511,548 - Bueti , et al. March 31, 2
2009-03-31
Nodal charge compensation for SST driver having data mux in output stage
Grant 7,511,530 - Cox , et al. March 31, 2
2009-03-31
Body-biased enhanced precision current mirror
Grant 7,501,880 - Bonaccio , et al. March 10, 2
2009-03-10
Intrinsic Rc Power Distribution For Noise Filtering Of Analog Supplies
App 20090051420 - Bonaccio; Anthony R. ;   et al.
2009-02-26
Design structures, method and systems of powering on integrated circuit
Grant 7,483,806 - Arsovski , et al. January 27, 2
2009-01-27
Method And Systems Of Powering On Integrated Circuit
App 20090022203 - Arsovski; Igor ;   et al.
2009-01-22
Structures Of Powering On Integrated Circuit
App 20090024972 - Arsovski; Igor ;   et al.
2009-01-22
Design Structures, Method And Systems Of Powering On Integrated Circuit
App 20090021085 - Arsovski; Igor ;   et al.
2009-01-22
Clock distribution network, structure, and method for providing balanced loading in integrated circuit clock trees
Grant 7,479,819 - Bueti , et al. January 20, 2
2009-01-20
method for providing automatic adaptation to frequency offsets in high speed serial links
Grant 7,477,713 - Cranford, Jr. , et al. January 13, 2
2009-01-13
Transmitter Bandwidth Optimization Circuit
App 20090004978 - Hsu; Louis L. ;   et al.
2009-01-01
Method for performing high speed serial link output stage having self adaptation for various impairments
Grant 7,460,602 - Clements , et al. December 2, 2
2008-12-02
High Speed Serial Link Output Stage Having Self Adaptation For Various Impairments
App 20080285661 - Clements; Steven M. ;   et al.
2008-11-20
Intrinsic RC power distribution for noise filtering of analog supplies
Grant 7,449,942 - Bonaccio , et al. November 11, 2
2008-11-11
Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path
Grant 7,429,877 - Arsovski , et al. September 30, 2
2008-09-30
Driver/equalizer with compensation for equalization non-idealities
Grant 7,411,422 - Clements , et al. August 12, 2
2008-08-12
Differential amplifier and method
Grant 7,405,620 - Cranford, Jr. , et al. July 29, 2
2008-07-29
CML delay cell with linear rail-to-rail tuning range and constant output swing
Grant 7,403,057 - Cranford, Jr. , et al. July 22, 2
2008-07-22
System and method for balancing delay of signal communication paths through well voltage adjustment
Grant 7,404,114 - Cranford, Jr. , et al. July 22, 2
2008-07-22
Flexible multimode logic element for use in a configurable mixed-logic signal distribution path
Grant 7,403,039 - Arsovski , et al. July 22, 2
2008-07-22
On-chip electromigration monitoring system
Grant 7,394,273 - Hsu , et al. July 1, 2
2008-07-01
Adjustment of PLL bandwidth for jitter control using feedback circuitry
Grant 7,391,271 - Cranford, Jr. , et al. June 24, 2
2008-06-24
Serial link output stage differential amplifier and method
Grant 7,391,266 - Cranford, Jr. , et al. June 24, 2
2008-06-24
Determining data signal jitter via asynchronous sampling
Grant 7,389,192 - Cranford, Jr. , et al. June 17, 2
2008-06-17
Method and apparatus for constructing a synchronous signal diagram from asynchronously sampled data
Grant 7,383,160 - Cranford, Jr. , et al. June 3, 2
2008-06-03
Impedance calibration for source series terminated serial link transmitter
Grant 7,368,902 - Clements , et al. May 6, 2
2008-05-06
Flexible multimode logic element for use in a configurable mixed-logic signal distribution path
Grant 7,362,138 - Arsovski , et al. April 22, 2
2008-04-22
Method and system for data and edge detection with correlation tables
Grant 7,349,498 - Cranford, Jr. , et al. March 25, 2
2008-03-25
System and method for transmitting data and additional information simultaneously within a wire based communication system
Grant 7,346,094 - Cranford, Jr. , et al. March 18, 2
2008-03-18
Method and system for using statistical signatures for testing high-speed circuits
Grant 7,340,660 - Cranford, Jr. , et al. March 4, 2
2008-03-04
Differential Amplifier and Method
App 20080018400 - Cranford, Jr.; Hayden C. ;   et al.
2008-01-24
Digital adaptive control loop for data deserialization
Grant 7,317,777 - Cranford, Jr. , et al. January 8, 2
2008-01-08
Method and Apparatus for Determining Data Signal Jitter Via Asynchronous Sampling
App 20080004821 - Cranford, Jr.; Hayden C. ;   et al.
2008-01-03
Self series terminated serial link transmitter having segmentation for amplitude, pre-emphasis, and slew rate control and voltage regulation for amplitude accuracy and high voltage protection
Grant 7,307,447 - Clements , et al. December 11, 2
2007-12-11
Power network reconfiguration using MEM switches
Grant 7,305,571 - Cranford, Jr. , et al. December 4, 2
2007-12-04
Structure and method for providing precision passive elements
Grant 7,300,807 - Coolbaugh , et al. November 27, 2
2007-11-27
Transistor Switch with Integral Body Connection to Prevent Latchup
App 20070268065 - Cranford, Jr.; Hayden C. ;   et al.
2007-11-22
Method for determining jitter of a signal in a serial link and high speed serial link
Grant 7,295,604 - Cranford, Jr. , et al. November 13, 2
2007-11-13
Method and system for scalable pre-driver to driver interface
Grant 7,289,572 - Cranford, Jr. , et al. October 30, 2
2007-10-30
Method and apparatus for determining jitter and pulse width from clock signal comparisons
Grant 7,286,947 - Cranford, Jr. , et al. October 23, 2
2007-10-23
Equalizer for reduced intersymbol interference via partial clock switching
Grant 7,286,620 - Cranford, Jr. , et al. October 23, 2
2007-10-23
Method and system for high frequency clock signal gating
Grant 7,279,950 - Cranford, Jr. , et al. October 9, 2
2007-10-09
Structure and method for providing gate leakage isolation locally within analog circuits
Grant 7,268,632 - Bonaccio , et al. September 11, 2
2007-09-11
Transistor switch with integral body connection to prevent latchup
Grant 7,268,613 - Cranford, Jr. , et al. September 11, 2
2007-09-11
Method and apparatus for reducing noise in a dynamic manner
Grant 7,218,135 - Arsovski , et al. May 15, 2
2007-05-15
Power savings in serial link transmitters
Grant 7,187,206 - Clements , et al. March 6, 2
2007-03-06
Receiver for clock and data recovery and method for calibrating sampling phases in a receiver for clock and data recovery
Grant 7,149,269 - Cranford, Jr. , et al. December 12, 2
2006-12-12
Dynamic measurement of communication channel characteristics using direct sequence spread spectrum (DSSS) systems, methods and program products
Grant 7,088,766 - Aust , et al. August 8, 2
2006-08-08
Method and apparatus for controlling common-mode output voltage in fully differential amplifiers
Grant 7,053,712 - Bonaccio , et al. May 30, 2
2006-05-30
Circuit and method for reducing jitter in a PLL of high speed serial links
Grant 7,042,277 - Cranford, Jr. , et al. May 9, 2
2006-05-09
Method and circuit for increased noise immunity for clocking signals in high speed digital systems
Grant 7,034,566 - Cranford, Jr. , et al. April 25, 2
2006-04-25
Programmable driver/equalizer with alterable analog finite impulse response (FIR) filter having low intersymbol interference and constant peak amplitude independent of coefficient settings
Grant 6,999,540 - Cranford, Jr. February 14, 2
2006-02-14
Method And Apparatus For Controlling Common-mode Output Voltage In Fully Differential Amplifiers
App 20060022753 - Bonaccio; Anthony R. ;   et al.
2006-02-02
Self-adaptive voltage regulator for a phase-locked loop
Grant 6,977,558 - Cranford, Jr. , et al. December 20, 2
2005-12-20
Method and system for configuring terminators in a serial communication system
Grant 6,968,413 - Cranford, Jr. , et al. November 22, 2
2005-11-22
Terminating resistor driver for high speed data communication
Grant 6,930,506 - Cranford, Jr. , et al. August 16, 2
2005-08-16
Low voltage CMOS circuit for on/off chip drive at high voltage
Grant 6,031,394 - Cranford, Jr. , et al. February 29, 2
2000-02-29
On chip multiple voltage generation using a charge pump and plural feedback sense circuits
Grant 4,752,699 - Cranford, Jr. , et al. June 21, 1
1988-06-21
Programmable oscillator with power down feature and frequency adjustment
Grant 4,536,720 - Cranford, Jr. , et al. August 20, 1
1985-08-20
High voltage on chip FET driver
Grant 4,429,237 - Cranford, Jr. , et al. January 31, 1
1984-01-31
Electrically alterable read only memory cell
Grant 4,404,577 - Cranford, Jr. , et al. September 13, 1
1983-09-13

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