Cosentino; Stephen J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cosentino; Stephen J..The latest application filed is for "guard ring integrated ldmos".

Company Profile

0.8.1

Cosentino; Stephen J. - Gilbert AZ
Cosentino; Stephen J. - Austin TX
Cosentino; Stephen J. - Mesa AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Guard ring integrated LDMOS Grant 8,278,710 - Khemka , et al. October 2, 2	2012-10-02
Guard Ring Integrated LDMOS App 20120018804 - Khemka; Vishnu K. ; et al.	2012-01-26
Method of making a substantially planar semiconductor surface Grant 5,225,365 - Cosentino July 6, 1	1993-07-06
Method of fabricating a double polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors Grant 5,037,768 - Cosentino August 6, 1	1991-08-06
Multiple step formation of conductive material layers Grant 4,808,555 - Mauntel , et al. February 28, 1	1989-02-28
Removable sidewall spacer for lightly doped drain formation using one mask level and differential oxidation Grant 4,745,086 - Parrillo , et al. May 17, 1	1988-05-17
Removable sidewall spacer for lightly doped drain formation using two mask levels Grant 4,722,909 - Parrillo , et al. February 2, 1	1988-02-02
CMOS process Grant 4,717,683 - Parrillo , et al. January 5, 1	1988-01-05
Buried n.sup.- channel implant for NMOS transistors Grant 4,701,775 - Cosentino , et al. October 20, 1	1987-10-20

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