loadpatents
name:-0.019237995147705
name:-0.018884181976318
name:-0.0036358833312988
CORVASCE; Chiara Patent Filings

CORVASCE; Chiara

Patent Applications and Registrations

Patent applications and USPTO patent grants for CORVASCE; Chiara.The latest application filed is for "reverse conducting insulated gate power semiconductor device having low conduction losses".

Company Profile
3.16.18
  • CORVASCE; Chiara - Bergdietikon CH
  • Corvasce; Chiara - Catania IT
  • Corvasce; Chiara - Via Pacini IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Reverse Conducting Insulated Gate Power Semiconductor Device Having Low Conduction Losses
App 20220181319 - PAPADOPOULOS; Charalampos ;   et al.
2022-06-09
Power Semiconductor Device and Shadow-Mask Free Method for Producing Such Device
App 20210391481 - Papadopoulos; Charalampos ;   et al.
2021-12-16
Insulated gate power semiconductor device and method for manufacturing such device
Grant 11,189,688 - De-Michielis , et al. November 30, 2
2021-11-30
Insulated Gate Power Semiconductor Device and Method for Manufacturing Such Device
App 20210320170 - De-Michielis; Luca ;   et al.
2021-10-14
Insulated gate power semiconductor device and method for manufacturing such a device
Grant 11,075,285 - De-Michielis , et al. July 27, 2
2021-07-27
Insulated gate bipolar transistor
Grant 10,629,714 - Corvasce , et al.
2020-04-21
Insulated Gate Power Semiconductor Device And Method For Manufacturing Such A Device
App 20190123172 - De-Michielis; Luca ;   et al.
2019-04-25
Insulated Gate Bipolar Transistor
App 20190109218 - Corvasce; Chiara ;   et al.
2019-04-11
Power semiconductor device with thick top-metal-design and method for manufacturing such power semiconductor device
Grant 10,141,196 - Matthias , et al. Nov
2018-11-27
Insulated gate power semiconductor device and method for manufacturing such a device
Grant 10,128,361 - De-Michielis , et al. November 13, 2
2018-11-13
Reverse-conducting semiconductor device
Grant 10,109,725 - Storasta , et al. October 23, 2
2018-10-23
Power Semiconductor Device With Thick Top-metal-design And Method For Manufacturing Such Power Semiconductor Device
App 20180012773 - Matthias; Sven ;   et al.
2018-01-11
Edge termination for semiconductor devices and corresponding fabrication method
Grant 9,859,360 - Antoniou , et al. January 2, 2
2018-01-02
Insulated gate bipolar transistor
Grant 9,825,158 - Corvasce November 21, 2
2017-11-21
Insulated Gate Power Semiconductor Device And Method For Manufacturing Such A Device
App 20170323959 - De-Michielis; Luca ;   et al.
2017-11-09
Reverse-conducting Semiconductor Device
App 20170294526 - Storasta; Liutauras ;   et al.
2017-10-12
Reverse-conducting semiconductor device
Grant 9,553,086 - Storasta , et al. January 24, 2
2017-01-24
Reverse-conducting Semiconductor Device
App 20160307888 - Storasta; Liutauras ;   et al.
2016-10-20
Edge Termination For Semiconductor Devices And Corresponding Fabrication Method
App 20160300904 - Antoniou; Marina ;   et al.
2016-10-13
Insulated Gate Bipolar Transistor
App 20160254376 - Corvasce; Chiara
2016-09-01
Insulated gate bipolar transistor
Grant 9,153,676 - Rahimo , et al. October 6, 2
2015-10-06
Insulated gate bipolar transistor
Grant 9,105,680 - Andenna , et al. August 11, 2
2015-08-11
Insulated gate bipolar transistor
Grant 9,099,520 - Rahimo , et al. August 4, 2
2015-08-04
Power Semiconductor Device And Method For Manufacturing Such A Power Semiconductor Device
App 20140370665 - RAHIMO; Munaf ;   et al.
2014-12-18
Insulated Gate Bipolar Transistor
App 20140124830 - RAHIMO; Munaf ;   et al.
2014-05-08
Insulated Gate Bipolar Transistor
App 20140124831 - RAHIMO; Munaf ;   et al.
2014-05-08
Insulated Gate Bipolar Transistor
App 20140124829 - ANDENNA; Maxi ;   et al.
2014-05-08
Contact structure for an integrated semiconductor device
Grant 7,052,985 - Zambrano , et al. May 30, 2
2006-05-30
Contact structure for an integrated semiconductor device
App 20040175927 - Zambrano, Raffaele ;   et al.
2004-09-09
Contact structure for an integrated semiconductor device
Grant 6,734,565 - Zambrano , et al. May 11, 2
2004-05-11
Method of fabricating a ferroelectric stacked memory cell
Grant 6,656,801 - Corvasce , et al. December 2, 2
2003-12-02
Contact structure for an integrated semiconductor device
App 20020180054 - Zambrano, Raffaele ;   et al.
2002-12-05
Structure of a stacked memory cell, in particular a ferroelectric cell
App 20020008269 - Corvasce, Chiara ;   et al.
2002-01-24
Structure of a stacked memory cell, in particular a ferroelectric cell
Grant 6,300,654 - Corvasce , et al. October 9, 2
2001-10-09

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