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name:-0.061507940292358
name:-0.055176019668579
name:-0.020450830459595
Copel; Matthew W. Patent Filings

Copel; Matthew W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Copel; Matthew W..The latest application filed is for "area-selective deposition of metal nitride to fabricate devices".

Company Profile
15.53.51
  • Copel; Matthew W. - Yorktown Heights NY
  • Copel; Matthew W - Yorktown Heights NY
  • Copel; Matthew W. - Katonah NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Area-selective Deposition Of Metal Nitride To Fabricate Devices
App 20220190229 - Wojtecki; Rudy J. ;   et al.
2022-06-16
Silicide passivation of niobium
App 20220102614 - Copel; Matthew W. ;   et al.
2022-03-31
Wet etching of samarium selenium for piezoelectric processing
Grant 11,011,387 - Armstrong , et al. May 18, 2
2021-05-18
Pre-programmed resistive cross-point array for neural network
Grant 10,970,624 - Copel April 6, 2
2021-04-06
Wet etching of samarium selenium for piezoelectric processing
Grant 10,930,519 - Armstrong , et al. February 23, 2
2021-02-23
Measuring flux, current, or integrated charge of low energy particles
Grant 10,901,010 - Copel , et al. January 26, 2
2021-01-26
Lateral Electrochemical Cell With Symmetric Response For Neuromorphic Computing
App 20200357995 - Copel; Matthew W. ;   et al.
2020-11-12
Lateral electrochemical cell with symmetric response for neuromorphic computing
Grant 10,833,270 - Copel , et al. November 10, 2
2020-11-10
Wet Etching Of Samarium Selenium For Piezoelectric Processing
App 20200227274 - Armstrong; Christine ;   et al.
2020-07-16
Wet Etching Of Samarium Selenium For Piezoelectric Processing
App 20200027749 - Armstrong; Christine ;   et al.
2020-01-23
Measuring Flux, Current, Or Integrated Charge Of Low Energy Particles
App 20190293690 - Copel; Matthew W. ;   et al.
2019-09-26
Measuring flux, current, or integrated charge of low energy particles
Grant 10,416,199 - Copel , et al. Sept
2019-09-17
Intermetallic contact for carbon nanotube FETs
Grant 10,374,163 - Copel , et al.
2019-08-06
Piezoelectronic switch device for RF applications
Grant 10,354,824 - Copel , et al. July 16, 2
2019-07-16
Wet etching of samarium selenium for piezoelectric processing
Grant 10,332,753 - Armstrong , et al.
2019-06-25
Wet etching of samarium selenium for piezoelectric processing
Grant 10,269,580 - Armstrong , et al.
2019-04-23
Intermetallic contact for carbon nanotube FETs
Grant 10,170,702 - Copel , et al. J
2019-01-01
Wet Etching Of Samarium Selenium For Piezoelectric Processing
App 20180233378 - Armstrong; Christine ;   et al.
2018-08-16
Wet Etching Of Samarium Selenium For Piezoelectric Processing
App 20180205000 - Armstrong; Christine ;   et al.
2018-07-19
Measuring Flux, Current, Or Integrated Charge Of Low Energy Particles
App 20180203045 - Copel; Matthew W. ;   et al.
2018-07-19
Intermetallic Contact For Carbon Nanotube Fets
App 20180198070 - Copel; Matthew W. ;   et al.
2018-07-12
Intermetallic Contact For Carbon Nanotube Fets
App 20180198071 - Copel; Matthew W. ;   et al.
2018-07-12
Pre-programmed Resistive Cross-point Array For Neural Network
App 20180089559 - COPEL; MATTHEW W.
2018-03-29
Piezoelectronic switch device for RF applications
Grant 9,881,759 - Copel , et al. January 30, 2
2018-01-30
Pre-programmed resistive cross-point array for neural network
Grant 9,659,249 - Copel May 23, 2
2017-05-23
Piezoelectronic Switch Device For Rf Applications
App 20170084413 - Copel; Matthew W. ;   et al.
2017-03-23
Piezoelectronic switch device for RF applications
Grant 9,472,368 - Copel , et al. October 18, 2
2016-10-18
Piezoelectronic Switch Device For Rf Applications
App 20160268083 - Copel; Matthew W. ;   et al.
2016-09-15
Integrating a piezoresistive element in a piezoelectronic transistor
Grant 9,419,201 - Bryce , et al. August 16, 2
2016-08-16
Passivation and alignment of piezoelectronic transistor piezoresistor
Grant 9,419,203 - Bryce , et al. August 16, 2
2016-08-16
Passivation And Alignment Of Piezoelectronic Transistor Piezoresistor
App 20160126446 - Bryce; Brian A. ;   et al.
2016-05-05
Integrating A Piezoresistive Element In A Piezoelectronic Transistor
App 20160126448 - Bryce; Brian A. ;   et al.
2016-05-05
Piezoelectronic Switch Device For Rf Applications
App 20160126044 - Copel; Matthew W. ;   et al.
2016-05-05
Passivation and alignment of piezoelectronic transistor piezoresistor
Grant 9,293,687 - Bryce , et al. March 22, 2
2016-03-22
Integrating a piezoresistive element in a piezoelectronic transistor
Grant 9,263,664 - Bryce , et al. February 16, 2
2016-02-16
Interface-free Metal Gate Stack
App 20150126025 - ANDO; Takashi ;   et al.
2015-05-07
Interface-free metal gate stack
Grant 8,975,174 - Ando , et al. March 10, 2
2015-03-10
Hydrazine-free solution deposition of chalcogenide films
Grant 8,803,141 - Mitzi , et al. August 12, 2
2014-08-12
Interface-free metal gate stack
Grant 8,791,004 - Ando , et al. July 29, 2
2014-07-29
FET device with stabilized threshold modifying material
Grant 8,735,243 - Copel , et al. May 27, 2
2014-05-27
Dielectric For Carbon-based Nano-devices
App 20140113416 - BOJARCZUK; Nestor A. ;   et al.
2014-04-24
Dielectric For Carbon-based Nano-devices
App 20140001440 - BOJARCZUK; Nestor A. ;   et al.
2014-01-02
Interface-free Metal Gate Stack
App 20130280901 - ANDO; Takashi ;   et al.
2013-10-24
Interface-free Metal Gate Stack
App 20130277751 - ANDO; Takashi ;   et al.
2013-10-24
Interface-free metal gate stack
Grant 8,564,066 - Ando , et al. October 22, 2
2013-10-22
Method of forming switching device having a molybdenum oxynitride metal gate
Grant 8,518,766 - Bojarczuk , et al. August 27, 2
2013-08-27
Switching Device Having A Molybdenum Oxynitride Metal Gate
App 20120270385 - Bojarczuk; Nestor A. ;   et al.
2012-10-25
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics
Grant 8,193,051 - Bojarczuk, Jr. , et al. June 5, 2
2012-06-05
Hydrazine-free solution deposition of chalcogenide films
Grant 8,134,150 - Mitzi , et al. March 13, 2
2012-03-13
Interface-free Metal Gate Stack
App 20110309449 - ANDO; TAKASHI ;   et al.
2011-12-22
Hydrazine-free solution deposition of chalcogenide films
Grant 8,053,772 - Mitzi , et al. November 8, 2
2011-11-08
Hydrazine-free Solution Deposition Of Chalcogenide Films
App 20110240932 - Mitzi; David B. ;   et al.
2011-10-06
Hydrazine-free solution deposition of chalcogenide films
Grant 7,999,255 - Mitzi , et al. August 16, 2
2011-08-16
Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices
Grant 7,999,323 - Cartier , et al. August 16, 2
2011-08-16
SELECTIVE IMPLEMENTATION OF BARRIER LAYERS TO ACHIEVE THRESHOLD VOLTAGE CONTROL IN CMOS DEVICE FABRICATION WITH HIGH-k DIELECTRICS
App 20110165767 - Bojarczuk, JR.; Nestor A. ;   et al.
2011-07-07
Hydrazine-free solution deposition of chalcogenide films
Grant 7,960,726 - Mitzi , et al. June 14, 2
2011-06-14
Methods for obtaining gate stacks with tunable threshold voltage and scaling
Grant 7,943,458 - Jagannathan , et al. May 17, 2
2011-05-17
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics
Grant 7,928,514 - Bojarczuk, Jr. , et al. April 19, 2
2011-04-19
Methods For Obtaining Gate Stacks With Tunable Threshold Voltage And Scaling
App 20110081754 - Jagannathan; Hemanth ;   et al.
2011-04-07
Switching Device Having A Molybdenum Oxynitride Metal Gate
App 20110042759 - Bojarczuk; Nestor A. ;   et al.
2011-02-24
Low threshold voltage semiconductor device with dual threshold voltage control means
Grant 7,858,500 - Cartier , et al. December 28, 2
2010-12-28
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high K dielectrics
Grant 7,745,278 - Bojarczuk, Jr. , et al. June 29, 2
2010-06-29
Hydrazine-free Solution Deposition Of Chalcogenide Films
App 20100041907 - Mitzi; David B. ;   et al.
2010-02-18
Hydrazine-free Solution Deposition Of Chalcogenide Films
App 20100040866 - Mitzi; David B. ;   et al.
2010-02-18
Hydrazine-free Solution Deposition Of Chalcogenide Films
App 20100040891 - Mitzi; David B. ;   et al.
2010-02-18
Hydrazine-free Solution Deposition Of Chalcogenide Films
App 20100019238 - Mitzi; David B. ;   et al.
2010-01-28
Using Metal/Metal Nitride Bilayers as Gate Electrodes in Self-Aligned Aggressively Scaled CMOS Devices
App 20090302399 - Cartier; Eduard A. ;   et al.
2009-12-10
Hydrazine-free solution deposition of chalcogenide films
Grant 7,618,841 - Mitzi , et al. November 17, 2
2009-11-17
Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices
Grant 7,598,545 - Cartier , et al. October 6, 2
2009-10-06
SELECTIVE IMPLEMENTATION OF BARRIER LAYERS TO ACHIEVE THRESHOLD VOLTAGE CONTROL IN CMOS DEVICE FABRICATION WITH HIGH-k DIELECTRICS
App 20090152642 - Bojarczuk, JR.; Nestor A. ;   et al.
2009-06-18
FET Device with Stabilized Threshold Modifying Material
App 20090039447 - Copel; Matthew W. ;   et al.
2009-02-12
Removal of charged defects from metal oxide-gate stacks
Grant 7,488,656 - Cartier , et al. February 10, 2
2009-02-10
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics
Grant 7,479,683 - Bojarczuk, Jr. , et al. January 20, 2
2009-01-20
Selective Implementation Of Barrier Layers To Achieve Treshold Voltage Control In Cmos Device Fabrication With High K Dielectrics
App 20090011610 - Bojarczuk, JR.; Nestor A. ;   et al.
2009-01-08
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics
Grant 7,452,767 - Bojarczuk, Jr. , et al. November 18, 2
2008-11-18
Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS
Grant 7,446,380 - Bojarczuk, Jr. , et al. November 4, 2
2008-11-04
Stabilization Of Flatband Voltages And Threshold Voltages In Hafnium Oxide Based Silicon Transistors For Cmos
App 20080258198 - Bojarczuk; Nestor A. ;   et al.
2008-10-23
Low Threshold Voltage Semiconductor Device With Dual Threshold Voltage Control Means
App 20080182389 - Cartier; Eduard A. ;   et al.
2008-07-31
Hydrazine-free solution deposition of chalcogenide films
App 20070099331 - Mitzi; David B. ;   et al.
2007-05-03
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics
App 20060275977 - Bojarczuk; Nestor A. JR. ;   et al.
2006-12-07
Removal of charged defects from metal oxide-gate stacks
App 20060246740 - Cartier; Eduard A. ;   et al.
2006-11-02
Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS
App 20060244035 - Bojarczuk; Nestor A. JR. ;   et al.
2006-11-02
Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices
App 20060237796 - Cartier; Eduard A. ;   et al.
2006-10-26
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics
Grant 7,105,889 - Bojarczuk, Jr. , et al. September 12, 2
2006-09-12
Hydrazine-free solution deposition of chalcogenide films
Grant 7,094,651 - Mitzi , et al. August 22, 2
2006-08-22
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics
App 20050269634 - Bojarczuk, Nestor A. JR. ;   et al.
2005-12-08
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics
App 20050269635 - Bojarczuk, Nestor A. JR. ;   et al.
2005-12-08
Dielectric stack without interfacial layer
Grant 6,861,728 - Bojarczuk, Jr. , et al. March 1, 2
2005-03-01
Hydrazine-free solution deposition of chalcogenide films
App 20050009225 - Mitzi, David B. ;   et al.
2005-01-13
Real-time model evaluation
Grant 6,735,556 - Copel May 11, 2
2004-05-11
Method for forming dielectric stack without interfacial layer
App 20030104666 - Bojarczuk, Nestor A. JR. ;   et al.
2003-06-05
Real-time model evaluation
App 20030046041 - Copel, Matthew W.
2003-03-06
Method for forming dielectric stack without interfacial layer
Grant 6,528,374 - Bojarczuk, Jr. , et al. March 4, 2
2003-03-04
Method for forming dielectric stack without interfacial layer
App 20020145168 - Bojarczuk, Nestor A. JR. ;   et al.
2002-10-10
Interfacial oxidation process for high-k gate dielectric process integration
Grant 6,444,592 - Ballantine , et al. September 3, 2
2002-09-03
Surfactant-enhanced epitaxy
Grant 5,628,834 - Copel , et al. May 13, 1
1997-05-13
Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen
Grant 5,624,869 - Agnello , et al. April 29, 1
1997-04-29
Surfactant-enhanced epitaxy
Grant 5,316,615 - Copel , et al. May 31, 1
1994-05-31

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