loadpatents
name:-0.0047440528869629
name:-0.032157182693481
name:-0.00056099891662598
Cope; L. Todd Patent Filings

Cope; L. Todd

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cope; L. Todd.The latest application filed is for "programmable logic array integrated circuits".

Company Profile
0.31.4
  • Cope; L. Todd - San Jose CA
  • Cope; L. Todd - Penang MY
  • Cope; L. Todd - Georgetown MY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Programmable logic array integrated circuits
Grant 6,897,679 - Cliff , et al. May 24, 2
2005-05-24
Programmable logic array integrated circuit devices
Grant 6,815,981 - Cliff , et al. November 9, 2
2004-11-09
Variable depth and width memory device
Grant RE38,651 - Sung , et al. November 9, 2
2004-11-09
Programmable logic array integrated circuits
App 20040066212 - Cliff, Richard G. ;   et al.
2004-04-08
Programmable logic with on-chip DLL or PLL to distribute clock
Grant 6,657,456 - Jefferson , et al. December 2, 2
2003-12-02
Programmable logic array integrated circuit devices
App 20030128051 - Cliff, Richard G. ;   et al.
2003-07-10
Programmable logic array integrated circuit devices
App 20030016053 - Cliff, Richard G. ;   et al.
2003-01-23
Programmable logic array integrated circuits
App 20020130681 - Cliff, Richard G. ;   et al.
2002-09-19
Programmable logic array integrated circuit devices
Grant 6,392,438 - Cliff , et al. May 21, 2
2002-05-21
Programmable logic with on-chip DLL or PLL to distribute clock
Grant 6,292,016 - Jefferson , et al. September 18, 2
2001-09-18
Programmable logic array integrated circuit devices
Grant 6,154,055 - Cliff , et al. November 28, 2
2000-11-28
Programmable logic array integrated circuits
Grant 6,134,173 - Cliff , et al. October 17, 2
2000-10-17
Programmable logic integrated circuit with on-chip DLL or PLL for clock distribution
Grant 6,130,552 - Jefferson , et al. October 10, 2
2000-10-10
Programming and verification address generation for random access memory blocks in programmable logic array integrated circuit devices
Grant 6,128,692 - Sung , et al. October 3, 2
2000-10-03
Programmable logic array integrated circuits
Grant 6,064,599 - Cliff , et al. May 16, 2
2000-05-16
Programmable logic array integrated circuits
Grant 6,028,808 - Cliff , et al. February 22, 2
2000-02-22
System for distributing clocks using a delay lock loop in a programmable logic circuit
Grant 5,963,069 - Jefferson , et al. October 5, 1
1999-10-05
Programmable logic array circuits comprising look up table implementation of fast carry adders and counters
Grant 5,926,036 - Cliff , et al. July 20, 1
1999-07-20
Programmable logic array integrated circuits
Grant 5,883,850 - Lee , et al. March 16, 1
1999-03-16
Programmable logic array intergrated circuit devices
Grant 5,850,151 - Cliff , et al. December 15, 1
1998-12-15
Programmable logic array integrated circuit devices
Grant 5,850,152 - Cliff , et al. December 15, 1
1998-12-15
Programmable logic array integrated circuits
Grant 5,848,005 - Cliff , et al. December 8, 1
1998-12-08
Look up table implementation of fast carry arithmetic and exclusive-or operations
Grant RE35,977 - Cliff , et al. December 1, 1
1998-12-01
Programmable logic array integrated circuits
Grant 5,838,628 - Cliff , et al. November 17, 1
1998-11-17
Programmable logic array integrated circuits
Grant 5,828,229 - Cliff , et al. October 27, 1
1998-10-27
Programmable logic array integrated circuits
Grant 5,812,479 - Cliff , et al. September 22, 1
1998-09-22
Programmable logic array integrated circuits
Grant 5,764,583 - Cliff , et al. June 9, 1
1998-06-09
System for distributing clocks using a delay lock loop in a programmable logic circuit
Grant 5,744,991 - Jefferson , et al. April 28, 1
1998-04-28
Programmable logic array integrated circuit devices
Grant 5,689,195 - Cliff , et al. November 18, 1
1997-11-18
Programmable logic array integrated circuits
Grant 5,668,771 - Cliff , et al. September 16, 1
1997-09-16
Programmable logic device having a compressed configuration file and associated decompression
Grant 5,563,592 - Cliff , et al. October 8, 1
1996-10-08
Programmable logic array integrated circuits
Grant 5,550,782 - Cliff , et al. August 27, 1
1996-08-27
Look up table implementation of fast carry arithmetic and exclusive-OR operations
Grant 5,481,486 - Cliff , et al. January 2, 1
1996-01-02
Expanded programmable logic architecture
Grant 5,463,328 - Cope , et al. October 31, 1
1995-10-31
Look up table implementation of fast carry for adders and counters
Grant 5,274,581 - Cliff , et al. December 28, 1
1993-12-28

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed