loadpatents
name:-0.013251066207886
name:-0.035637140274048
name:-0.001535177230835
Coon; Brett Patent Filings

Coon; Brett

Patent Applications and Registrations

Patent applications and USPTO patent grants for Coon; Brett.The latest application filed is for "dynamic loading of radar unit configuration data based on changing radar parameters".

Company Profile
1.29.10
  • Coon; Brett - Mountain View CA
  • Coon; Brett - San Jose CA
  • Coon; Brett - Milpitas CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Dynamic Loading of Radar Unit Configuration Data Based on Changing Radar Parameters
App 20210181302 - Duncklee; Kevin ;   et al.
2021-06-17
Signal Processing for Near-Field Radar
App 20210080539 - Campbell; Timothy ;   et al.
2021-03-18
Signal processing for near-field radar
Grant 10,866,305 - Campbell , et al. December 15, 2
2020-12-15
System and method of instruction modification
Grant 8,549,266 - Banning , et al. October 1, 2
2013-10-01
Pipeline replay support for multicycle operations
Grant 8,516,224 - Coon , et al. August 20, 2
2013-08-20
Pipeline Replay Support For Multicycle Operations
App 20120166768 - Coon; Brett ;   et al.
2012-06-28
Pipeline replay support for multicycle operations
Grant 8,117,423 - Coon , et al. February 14, 2
2012-02-14
System And Method Of Instruction Modification
App 20110238961 - Banning; John ;   et al.
2011-09-29
System and method of instruction modification
Grant 7,984,277 - Banning , et al. July 19, 2
2011-07-19
Pipeline replay support for unaligned memory operations
Grant 7,886,135 - Coon , et al. February 8, 2
2011-02-08
System And Method Of Instruction Modification
App 20100138638 - Banning; John ;   et al.
2010-06-03
Across-thread Out-of-order Instruction Dispatch In A Multithreaded Microprocessor
App 20100122067 - Lindholm; John Erik ;   et al.
2010-05-13
System and method of instruction modification
Grant 7,698,539 - Banning , et al. April 13, 2
2010-04-13
Pipeline replay support for multi-cycle operations
Grant 7,685,403 - Coon , et al. March 23, 2
2010-03-23
Across-thread out-of-order instruction dispatch in a multithreaded microprocessor
Grant 7,676,657 - Lindholm , et al. March 9, 2
2010-03-09
System and method for translating non-native instructions to native instructions for processing on a host processor
Grant 7,664,935 - Coon , et al. February 16, 2
2010-02-16
Method and system for storing and retrieving a translation of target program instruction from a host processor using fast look-up of indirect branch destination in a dynamic translation system
Grant 7,644,210 - Banning , et al. January 5, 2
2010-01-05
System and Method for Translating Non-Native Instructions to Native Instructions for Processing on a Host Processor
App 20080162880 - Coon; Brett ;   et al.
2008-07-03
System and method for translating non-native instructions to native instructions for processing on a host processor
Grant 7,343,473 - Coon , et al. March 11, 2
2008-03-11
Across-thread Out-of-order Instruction Dispatch In A Multithreaded Microprocessor
App 20070214343 - Lindholm; John Erik ;   et al.
2007-09-13
Pipeline replay support for unaligned memory operations
Grant 7,134,001 - Coon , et al. November 7, 2
2006-11-07
Fast look-up of indirect branch destination in a dynamic translation system
Grant 7,111,096 - Banning , et al. September 19, 2
2006-09-19
System and method for translating non-native instructions to native instructions for processing on a host processor
App 20050251653 - Coon, Brett ;   et al.
2005-11-10
System and method for translating non-native instructions to native instructions for processing on a host processor
Grant 6,954,847 - Coon , et al. October 11, 2
2005-10-11
Use of enable bits to control execution of selected instructions
Grant 6,738,892 - Coon , et al. May 18, 2
2004-05-18
Pipeline replay support for unaligned memory operations
Grant 6,728,865 - Coon , et al. April 27, 2
2004-04-27
Link pipe system for storage and retrieval of sequences of branch addresses
Grant 6,640,297 - Banning , et al. October 28, 2
2003-10-28
Fast look-up of indirect branch destination in a dynamic translation system
Grant 6,615,300 - Banning , et al. September 2, 2
2003-09-02
Pipeline replay support for multi-cycle operations wherein all VLIW instructions are flushed upon detection of a multi-cycle atom operation in a VLIW instruction
Grant 6,604,188 - Coon , et al. August 5, 2
2003-08-05
System and method for translating non-native instructions to native instructions for processing on a host processor
App 20030084270 - Coon, Brett ;   et al.
2003-05-01
Programmable event counter system
Grant 6,356,615 - Coon , et al. March 12, 2
2002-03-12
System and method for translating non-native instructions to native instructions for processing on a host processor
Grant 6,263,423 - Coon , et al. July 17, 2
2001-07-17
System and method for handling load and/or store operations in a superscalar microprocessor
Grant 5,987,593 - Senter , et al. November 16, 1
1999-11-16
Superscalar microprocessor for out-of-order and concurrently executing at least two RISC instructions translating from in-order CISC instructions
Grant 5,983,334 - Coon , et al. November 9, 1
1999-11-09
System for translating non-native instructions to native instructions and combining them into a final bucket for processing on a host processor
Grant 5,619,666 - Coon , et al. April 8, 1
1997-04-08
Method for translating non-native instructions to native instructions and combining them into a final bucket for processing on a host processor
Grant 5,546,552 - Coon , et al. August 13, 1
1996-08-13
System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer
Grant 5,438,668 - Coon , et al. August 1, 1
1995-08-01

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