Coolbaugh; Douglas Duane

Patent Applications and Registrations

Patent applications and USPTO patent grants for Coolbaugh; Douglas Duane.The latest application filed is for "apparatus and method for thin die-to-wafer bonding".

Company Profile

0.26.28

Coolbaugh; Douglas Duane - Highland NY US
Coolbaugh; Douglas Duane - Essex Junction VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Apparatus and method for integration of through substrate vias Grant 8,969,200 - Hebding , et al. March 3, 2	2015-03-03
Method for thin die-to-wafer bonding Grant 8,697,542 - Pascual , et al. April 15, 2	2014-04-15
Apparatus And Method For Thin Die-to-wafer Bonding App 20130273691 - PASCUAL; Daniel ; et al.	2013-10-17
Apparatus And Method For Integration Of Through Substrate Vias App 20130270711 - HEBDING; Jeremiah ; et al.	2013-10-17
MIM capacitor and method of making same Grant 8,390,038 - Coolbaugh , et al. March 5, 2	2013-03-05
Method of integration of a MIM capacitor with a lower plate of metal gate material formed on an STI region or a silicide region formed in or on the surface of a doped well with a high K dielectric material Grant 7,915,134 - Chinthakindi , et al. March 29, 2	2011-03-29
Post last wiring level inductor using patterned plate process Grant 7,763,954 - Chinthakindi , et al. July 27, 2	2010-07-27
Post last wiring level inductor using patterned plate process Grant 7,741,698 - Chinthakindi , et al. June 22, 2	2010-06-22
Post last wiring level inductor using patterned plate process Grant 7,732,294 - Chinthakindi , et al. June 8, 2	2010-06-08
Post last wiring level inductor using patterned plate process Grant 7,732,295 - Chinthakindi , et al. June 8, 2	2010-06-08
Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology Grant 7,713,829 - Chu , et al. May 11, 2	2010-05-11
Post last wiring level inductor using patterned plate process Grant 7,573,117 - Chinthakindi , et al. August 11, 2	2009-08-11
MIM capacitor and method of making same Grant 7,488,643 - Coolbaugh , et al. February 10, 2	2009-02-10
Method of Integration of a MIM Capacitor with a Lower Plate of Metal Gate Material Formed on an STI Region or a Silicide Region Formed in or on the Surface of a Doped Well with a High K Dielectric Material App 20090004809 - Chinthakindi; Anil Kumar ; et al.	2009-01-01
Post Last Wiring Level Inductor Using Patterned Plate Process App 20080290458 - Chinthakindi; Anil Kumar ; et al.	2008-11-27
Post Last Wiring Level Inductor Using Patterned Plate Process App 20080293210 - Chinthakindi; Anil Kumar ; et al.	2008-11-27
Post Last Wiring Level Inductor Using Patterned Plate Process App 20080293233 - Chinthakindi; Anil Kumar ; et al.	2008-11-27
Post Last Wiring Level Inductor Using Patterned Plate Process App 20080277759 - Chinthakindi; Anil Kumar ; et al.	2008-11-13
Post Last Wiring Level Inductor Using Patterned Plate Process App 20080272458 - Chinthakindi; Anil Kumar ; et al.	2008-11-06
Mim Capacitor And Method Of Making Same App 20080232025 - Coolbaugh; Douglas Duane ; et al.	2008-09-25
Metal-oxide-semiconductor (mos) Varactors And Methods Of Forming Mos Varactors App 20080149983 - Rassel; Robert Mark ; et al.	2008-06-26
Lateral silicided diodes Grant 7,381,997 - Coolbaugh , et al. June 3, 2	2008-06-03
INCORPORATION OF CARBON IN SILICON/SILICON GERMANIUM EPITAXIAL LAYER TO ENHANCE YIELD FOR Si-Ge BIPOLAR TECHNOLOGY App 20080124881 - Chu; Jack Ooh ; et al.	2008-05-29
Integration of a MIM capacitor with a plate formed in a well region and with a high-k dielectric Grant 7,361,950 - Chinthakindi , et al. April 22, 2	2008-04-22
Lateral Silicided Diodes App 20080067623 - Coolbaugh; Douglas Duane ; et al.	2008-03-20
Lateral silicided diodes Grant 7,335,927 - Coolbaugh , et al. February 26, 2	2008-02-26
Mim Capacitor And Method Of Making Same App 20070296085 - Coolbaugh; Douglas Duane ; et al.	2007-12-27
Lateral Silicided Diodes App 20070176252 - Coolbaugh; Douglas Duane ; et al.	2007-08-02
One-mask High-k Metal-insulator-metal Capacitor Integration In Copper Back-end-of-line Processing App 20070158714 - Eshun; Ebenezer E. ; et al.	2007-07-12
Passivation for improved bipolar yield Grant 7,214,593 - Coolbaugh , et al. May 8, 2	2007-05-08
Integration Of A Mim Capacitor Over A Metal Gate Or Silicide With High-k Dielectric Materials App 20070057343 - Chinthakindi; Anil Kumar ; et al.	2007-03-15
Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology Grant 7,173,274 - Chu , et al. February 6, 2	2007-02-06
Post Last Wiring Level Inductor Using Patterned Plate Process App 20070026659 - Chinthakindi; Anil Kumar ; et al.	2007-02-01
STI pull-down to control SiGe facet growth Grant 6,936,509 - Coolbaugh , et al. August 30, 2	2005-08-30
Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology App 20050054171 - Chu, Jack Oon ; et al.	2005-03-10
Method of fabricating a polysilicon capacitor utilizing fet and bipolar base polysilicon layers Grant 6,800,921 - Coolbaugh , et al. October 5, 2	2004-10-05
Sti pull-down to control SiGe facet growth App 20040063273 - Coolbaugh, Douglas Duane ; et al.	2004-04-01
Sti pull-down to control SiGe facet growth Grant 6,674,102 - Coolbaugh , et al. January 6, 2	2004-01-06
Method of fabricating a polysilicon capacitor utilizing FET and bipolar base polysilicon layers Grant 6,670,228 - Coolbaugh , et al. December 30, 2	2003-12-30
A Dual Stacked Metal-insulator-metal Capacitor And Method For Making Same App 20030197215 - Coolbaugh, Douglas Duane ; et al.	2003-10-23
Method of fabricating a polysilicon capacitor utilizing FET and bipolar base polysilicon layers App 20030141534 - Coolbaugh, Douglas Duane ; et al.	2003-07-31
Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology App 20020121676 - Chu, Jack Oon ; et al.	2002-09-05
Method of fabricating a poly-poly capacitor with a SiGe BiCMOS integration scheme Grant 6,440,811 - Coolbaugh , et al. August 27, 2	2002-08-27
Incorporation Of Carbon In Silicon/silicon Germanium Epitaxial Layer To Enhance Yield For Si-ge Bipolar Technology App 20020100917 - Chu, Jack Oon ; et al.	2002-08-01
Passivation for improved bipolar yield App 20020102787 - Coolbaugh, Douglas Duane ; et al.	2002-08-01
Sti pull-down to control SiGe facet growth App 20020096693 - Coolbaugh, Douglas Duane ; et al.	2002-07-25
Moscap Design For Improved Reliability App 20020017693 - COOLBAUGH, DOUGLAS DUANE ; et al.	2002-02-14
Chemically enhanced anneal for removing trench stress resulting in improved bipolar yield Grant 6,271,100 - Ballantine , et al. August 7, 2	2001-08-07
HTO (high temperature oxide) deposition for capacitor dielectrics Grant 6,218,315 - Ballamine , et al. April 17, 2	2001-04-17