Cook; Peter William
Patent Applications and Registrations
Patent applications and USPTO patent grants for Cook; Peter William.The latest application filed is for "method and structure for short range leakage control in pipelined circuits".
- Cook; Peter William - Mount Kisco NY
- Cook; Peter William - Bedford Corners NY
- Cook; Peter William - Cambridgeshire GB
| Patent | Date |
|---|---|
| Method and structure for short range leakage control in pipelined circuits Grant 6,946,869 - Jacobson , et al. September 20, 2 | 2005-09-20 |
| Asynchronous pipeline control interface using tag values to control passing data through successive pipeline stages Grant 6,925,549 - Cook , et al. August 2, 2 | 2005-08-02 |
| Method and structure for short range leakage control in pipelined circuits App 20050083081 - Jacobson, Hans M. ; et al. | 2005-04-21 |
| Web tensioning device Grant 6,775,961 - Cook , et al. August 17, 2 | 2004-08-17 |
| Web tensioning device App 20020152729 - Cook, Peter William ; et al. | 2002-10-24 |
| Asynchronous pipeline control interface App 20020083298 - Cook, Peter William ; et al. | 2002-06-27 |
| Interlocked pipelined CMOS Grant 6,182,233 - Schuster , et al. January 30, 2 | 2001-01-30 |
| Method of clock routing for semiconductor chips Grant 6,006,025 - Cook , et al. December 21, 1 | 1999-12-21 |
| Comparator circuit for a C-2C A/D and D/A converter Grant 4,097,753 - Cook , et al. June 27, 1 | 1978-06-27 |
| A/D and D/A converter using C-2C ladder network Grant 4,028,694 - Cook , et al. June 7, 1 | 1977-06-07 |
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