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name:-0.61419010162354
name:-0.49873304367065
name:-0.10106515884399
Connelly; Daniel J. Patent Filings

Connelly; Daniel J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Connelly; Daniel J..The latest application filed is for "method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions".

Company Profile
4.42.35
  • Connelly; Daniel J. - Redwood City CA
  • Connelly; Daniel J. - San Francisco CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 11,355,613 - Grupp , et al. June 7, 2
2022-06-07
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20210305392 - Grupp; Daniel E. ;   et al.
2021-09-30
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 11,056,569 - Grupp , et al. July 6, 2
2021-07-06
Insulated gate field effect transistor having passivated schottky barriers to the channel
Grant 11,043,571 - Grupp , et al. June 22, 2
2021-06-22
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 11,018,237 - Grupp , et al. May 25, 2
2021-05-25
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 10,950,707 - Grupp , et al. March 16, 2
2021-03-16
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 10,937,880 - Grupp , et al. March 2, 2
2021-03-02
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20200273960 - Grupp; Daniel E. ;   et al.
2020-08-27
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20200273961 - Grupp; Daniel E. ;   et al.
2020-08-27
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20200243662 - Grupp; Daniel E. ;   et al.
2020-07-30
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20190334006 - Grupp; Daniel E. ;   et al.
2019-10-31
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 10,388,748 - Grupp , et al. A
2019-08-20
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 10,186,592 - Grupp , et al. Ja
2019-01-22
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 10,090,395 - Grupp , et al. October 2, 2
2018-10-02
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20180269298 - Grupp; Daniel E. ;   et al.
2018-09-20
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20180166552 - Grupp; Daniel E. ;   et al.
2018-06-14
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 9,905,691 - Grupp , et al. February 27, 2
2018-02-27
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20180033862 - Grupp; Daniel E. ;   et al.
2018-02-01
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 9,812,542 - Grupp , et al. November 7, 2
2017-11-07
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers To The Channel
App 20170133476 - Grupp; Daniel E. ;   et al.
2017-05-11
Insulated gate field effect transistor having passivated schottky barriers to the channel
Grant 9,583,614 - Grupp , et al. February 28, 2
2017-02-28
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20160372564 - Grupp; Daniel E. ;   et al.
2016-12-22
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 9,461,167 - Grupp , et al. October 4, 2
2016-10-04
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 9,425,277 - Grupp , et al. August 23, 2
2016-08-23
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20160172492 - Grupp; Daniel E. ;   et al.
2016-06-16
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20160172491 - Grupp; Daniel E. ;   et al.
2016-06-16
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 9,209,261 - Grupp , et al. December 8, 2
2015-12-08
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20150287800 - Grupp; Daniel E. ;   et al.
2015-10-08
Insulated gate field effect transistor having passivated schottky barriers to the channel
Grant 8,916,437 - Grupp , et al. December 23, 2
2014-12-23
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers To The Channel
App 20140284666 - Grupp; Daniel E. ;   et al.
2014-09-25
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 8,766,336 - Grupp , et al. July 1, 2
2014-07-01
Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source(s) and/or drain(s)
Grant 8,658,523 - Faulkner , et al. February 25, 2
2014-02-25
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers To The Channel
App 20130140629 - Grupp; Daniel E. ;   et al.
2013-06-06
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20130119446 - Grupp; Daniel E. ;   et al.
2013-05-16
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 8,431,469 - Grupp , et al. April 30, 2
2013-04-30
Insulated gate field effect transistor having passivated schottky barriers to the channel
Grant 8,377,767 - Grupp , et al. February 19, 2
2013-02-19
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20120280294 - Grupp; Daniel E. ;   et al.
2012-11-08
Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor
Grant 8,263,467 - Grupp , et al. September 11, 2
2012-09-11
Channel strain induced by strained metal in FET source or drain
Grant 8,263,466 - Clifton , et al. September 11, 2
2012-09-11
Field effect transistor source or drain with a multi-facet surface
Grant 8,212,336 - Goebel , et al. July 3, 2
2012-07-03
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers To The Channel
App 20110210376 - Grupp; Daniel E. ;   et al.
2011-09-01
Method of making a semiconductor device having a strained semiconductor active region using edge relaxation, a buried stressor layer and a sacrificial stressor layer
Grant 8,003,486 - Gaines , et al. August 23, 2
2011-08-23
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20110169124 - Grupp; Daniel E. ;   et al.
2011-07-14
Method of forming a field effect transistors with a sacrificial stressor layer and strained source and drain regions formed in recesses
Grant 7,972,916 - Connelly , et al. July 5, 2
2011-07-05
Process For Fabricating A Self-aligned Deposited Source/drain Insulated Gate Field-effect Transistor
App 20110124170 - Grupp; Daniel E. ;   et al.
2011-05-26
Strained Semiconductor Using Elastic Edge Relaxation, a Buried Stressor Layer and a Sacrificial Stressor Layer
App 20110092047 - Gaines; R. Stockton ;   et al.
2011-04-21
Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor
Grant 7,902,029 - Grupp , et al. March 8, 2
2011-03-08
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 7,884,003 - Grupp , et al. February 8, 2
2011-02-08
Insulated gate field effect transistor having passivated schottky barriers to the channel
Grant 7,883,980 - Grupp , et al. February 8, 2
2011-02-08
Method For Making Semiconductor Insulated-gate Field-effect Transistor Having Multilayer Deposited Metal Source(s) And/or Drain(s)
App 20110008953 - Faulkner; Carl M. ;   et al.
2011-01-13
Strained semiconductor using elastic edge relaxation, a buried stressor layer and a sacrificial stressor layer
Grant 7,851,325 - Gaines , et al. December 14, 2
2010-12-14
Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source(s) and/or drain(s)
Grant 7,816,240 - Faulkner , et al. October 19, 2
2010-10-19
Tensile strained semiconductor on insulator using elastic edge relaxation and a sacrificial stressor layer
Grant 7,700,416 - Clifton , et al. April 20, 2
2010-04-20
Field Effect Transistor Source Or Drain With A Multi-facet Surface
App 20100065887 - Goebel; Andreas ;   et al.
2010-03-18
Channel Strain Induced By Strained Metal In Fet Source Or Drain
App 20090104746 - Clifton; Paul ;   et al.
2009-04-23
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20090104770 - Grupp; Daniel E. ;   et al.
2009-04-23
Process For Fabricating A Field-effect Transistor With Doping Segregation Used In Source And/or Drain
App 20090101972 - Gaines; R. Stockton ;   et al.
2009-04-23
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 7,462,860 - Grupp , et al. December 9, 2
2008-12-09
Insulated gate field-effect transistor having III-VI source/drain layer(s)
Grant 7,382,021 - Faulkner , et al. June 3, 2
2008-06-03
Method For Making Semiconductor Insulated-gate Field-effect Transistor Having Multilayer Deposited Metal Source(s) And/or Drain(s)
App 20070224739 - Faulkner; Carl M. ;   et al.
2007-09-27
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 7,176,483 - Grupp , et al. February 13, 2
2007-02-13
Insulated gate field effect transistor having passivated schottky barriers to the channel
App 20070026591 - Grupp; Daniel E. ;   et al.
2007-02-01
Insulated gate field effect transistor having passivated Schottky barriers to the channel
Grant 7,112,478 - Grupp , et al. September 26, 2
2006-09-26
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
Grant 7,084,423 - Grupp , et al. August 1, 2
2006-08-01
Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor
App 20060084232 - Grupp; Daniel E. ;   et al.
2006-04-20
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
App 20050247956 - Grupp, Daniel E. ;   et al.
2005-11-10
Insulated gate field-effect transistor having III-VI source/drain layer(s)
App 20050104137 - Faulkner, Carl ;   et al.
2005-05-19
Transistor with workfunction-induced charge layer
Grant 6,891,234 - Connelly , et al. May 10, 2
2005-05-10
Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
App 20050093027 - Grupp, Daniel E. ;   et al.
2005-05-05
Insulated gate field effect transistor having passivated schottky barriers to the channel
Grant 6,833,556 - Grupp , et al. December 21, 2
2004-12-21
Insulated gate field effect transistor having passivated Schottky barriers to the channel
App 20040142524 - Grupp, Daniel E. ;   et al.
2004-07-22
Insulated gate field effect transistor having passivated schottky barriers to the channel
App 20040026736 - Grupp, Daniel E. ;   et al.
2004-02-12
Method For Depinning The Fermi Level Of A Semiconductor At An Electrical Junction And Devices Incorporating Such Junctions
App 20040026687 - Grupp, Daniel E. ;   et al.
2004-02-12

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