loadpatents
name:-0.015440940856934
name:-0.015504121780396
name:-0.0005950927734375
Connell; Mike Patent Filings

Connell; Mike

Patent Applications and Registrations

Patent applications and USPTO patent grants for Connell; Mike.The latest application filed is for "sealing and communicating in wells".

Company Profile
0.13.12
  • Connell; Mike - Boise ID US
  • Connell; Mike - Duncan OK
  • Connell; Mike - Oneida WI
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Substrate comprising a plurality of integrated circuitry die, and a substrate
Grant 8,461,685 - Jiang , et al. June 11, 2
2013-06-11
Method for fabricating board on chip (BOC) semiconductor package with circuit side polymer layer
Grant 7,537,966 - Connell , et al. May 26, 2
2009-05-26
Sealing and communicating in wells
Grant 7,510,017 - Howell , et al. March 31, 2
2009-03-31
Method for fabricating semiconductor package with circuit side polymer layer
Grant 7,479,413 - Connell , et al. January 20, 2
2009-01-20
Sealing and communicating in wells
App 20080110644 - Howell; Matt ;   et al.
2008-05-15
Treatment of a ground semiconductor die to improve adhesive bonding to a substrate
Grant 7,170,184 - Jiang , et al. January 30, 2
2007-01-30
Method for fabricating board on chip (BOC) semiconductor package with circuit side polymer layer
App 20060292752 - Connell; Mike ;   et al.
2006-12-28
Methods of fabricating integrated circuitry
Grant 7,078,267 - Jiang , et al. July 18, 2
2006-07-18
Substrate comprising a plurality of integrated circuitry die, and a substrate
App 20060030077 - Jiang; Tongbi ;   et al.
2006-02-09
Method for fabricating semiconductor package with circuit side polymer layer
App 20060030081 - Connell; Mike ;   et al.
2006-02-09
Methods of fabricating integrated circuitry
App 20060030078 - Jiang; Tongbi ;   et al.
2006-02-09
Semiconductor package with circuit side polymer layer and wafer level fabrication method
Grant 6,995,041 - Connell , et al. February 7, 2
2006-02-07
Stacked semiconductor package with circuit side polymer layer
Grant 6,949,834 - Connell , et al. September 27, 2
2005-09-27
Protective layer for use in packaging a semiconductor die and method for forming same
App 20050158910 - Jiang, Tongbi ;   et al.
2005-07-21
Method for forming a protective layer for use in packaging a semiconductor die
Grant 6,881,606 - Jiang , et al. April 19, 2
2005-04-19
Ozone treatment of a ground semiconductor die to improve adhesive bonding to a substrate
Grant 6,812,064 - Jiang , et al. November 2, 2
2004-11-02
Method for Forming a Protective Layer for Use In Packaging a Semiconductor Die
App 20040183163 - Jiang, Tongbi ;   et al.
2004-09-23
Semiconductor package with circuit side polymer layer and wafer level fabrication method
Grant 6,791,168 - Connell , et al. September 14, 2
2004-09-14
Stacked semiconductor package with circuit side polymer layer
App 20040171191 - Connell, Mike ;   et al.
2004-09-02
Methods of fabricating integrated circuitry
App 20040102022 - Jiang, Tongbi ;   et al.
2004-05-27
Semiconductor package with circuit side polymer layer and wafer level fabrication method
App 20040009631 - Connell, Mike ;   et al.
2004-01-15
Ozone treatment of a ground semiconductor die to improve adhesive bonding to a substrate
App 20030109081 - Jiang, Tongbi ;   et al.
2003-06-12
Ozone treatment of a ground semiconductor die to improve adhesive bonding to a substrate
App 20030087507 - Jiang, Tongbi ;   et al.
2003-05-08
Spray arch for vehicle washing machine
Grant D442,749 - Jones , et al. May 22, 2
2001-05-22

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