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Patent applications and USPTO patent grants for Colwell; Michael J..The latest application filed is for "dual-height cell with variable width power rail architecture".
Patent | Date |
---|---|
Dual-height cell with variable width power rail architecture Grant 7,129,562 - Gheewala , et al. October 31, 2 | 2006-10-31 |
Dual-height cell with variable width power rail architecture Grant 6,838,713 - Gheewala , et al. January 4, 2 | 2005-01-04 |
Gate array architecture using elevated metal levels for customization Grant 6,617,621 - Gheewala , et al. September 9, 2 | 2003-09-09 |
Programmable polysilicon gate array base cell architecture Grant 5,917,207 - Colwell , et al. June 29, 1 | 1999-06-29 |
Low profile variable width input/output cells Grant 5,777,354 - Cheung , et al. July 7, 1 | 1998-07-07 |
Variable width low profile gate array input/output architecture Grant 5,760,428 - Colwell , et al. June 2, 1 | 1998-06-02 |
High density gate array base cell architecture Grant 5,698,873 - Colwell , et al. December 16, 1 | 1997-12-16 |
Method of fabricating a programmable polysilicon gate array base cell structure Grant 5,691,218 - Colwell , et al. November 25, 1 | 1997-11-25 |
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