loadpatents
name:-0.19251918792725
name:-0.14409303665161
name:-0.040031909942627
COLOMBO; Luigi Patent Filings

COLOMBO; Luigi

Patent Applications and Registrations

Patent applications and USPTO patent grants for COLOMBO; Luigi.The latest application filed is for "hexagonal boron nitride structures".

Company Profile
39.124.152
  • COLOMBO; Luigi - Dallas TX
  • COLOMBO; Luigi - Dalllas TX
  • Colombo; Luigi - Milan N/A IT
  • Colombo; Luigi - Milano IT
  • COLOMBO; Luigi - Malnate IT
  • Colombo; Luigi - Malnate VA
  • Colombo; Luigi - Arona Novara
  • Colombo; Luigi - Busto Arsizio IT
  • Colombo; Luigi - Arona IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Hexagonal Boron Nitride Structures
App 20220250909 - COLOMBO; Luigi ;   et al.
2022-08-11
Multi-layered SP.sup.2-bonded carbon tubes
Grant 11,390,527 - Cook , et al. July 19, 2
2022-07-19
Hexagonal boron nitride structures
Grant 11,370,662 - Colombo , et al. June 28, 2
2022-06-28
Filler Particles For Polymers
App 20220169773 - DADVAND; Nazila ;   et al.
2022-06-02
Multi-super lattice for switchable arrays
Grant 11,309,388 - Cook , et al. April 19, 2
2022-04-19
Integration of graphene and boron nitride hetero-structure device over semiconductor layer
Grant 11,296,237 - Venugopal , et al. April 5, 2
2022-04-05
Filler particles for polymers
Grant 11,254,775 - Dadvand , et al. February 22, 2
2022-02-22
Lattice bump interconnect
Grant 11,145,598 - Cook , et al. October 12, 2
2021-10-12
Semicondctor Device Package Thermal Conduit
App 20210272804 - Venugopal; Archana ;   et al.
2021-09-02
Integration of graphene and boron nitride hetero-structure device
Grant 11,081,593 - Venugopal , et al. August 3, 2
2021-08-03
Metal-graphene structures forming a lattice of interconnected segments
Grant 11,063,120 - Colombo , et al. July 13, 2
2021-07-13
Precision Capacitor
App 20210202688 - Fernandes; Poornika ;   et al.
2021-07-01
Semiconductor device package thermal conduit
Grant 11,004,680 - Venugopal , et al. May 11, 2
2021-05-11
Thermal Routing Trench By Additive Processing
App 20210118762 - Cook; Benjamin Stassen ;   et al.
2021-04-22
Precision capacitor
Grant 10,964,778 - Fernandes , et al. March 30, 2
2021-03-30
Graphene FET with graphitic interface layer at contacts
Grant 10,923,567 - Colombo , et al. February 16, 2
2021-02-16
Thermal routing trench by additive processing
Grant 10,861,763 - Cook , et al. December 8, 2
2020-12-08
Multi-super Lattice For Switchable Arrays
App 20200381517 - Cook; Benjamin Stassen ;   et al.
2020-12-03
Integrated circuit nanoparticle thermal routing structure in interconnect region
Grant 10,811,334 - Cook , et al. October 20, 2
2020-10-20
Dissimilar material interface having lattices
Grant 10,804,201 - Venugopal , et al. October 13, 2
2020-10-13
Interconnect via with grown graphitic material
Grant 10,790,228 - Venugopal , et al. September 29, 2
2020-09-29
Multi-super lattice for switchable arrays
Grant 10,748,999 - Cook , et al. A
2020-08-18
Precision Capacitor
App 20200219969 - Fernandes; Poornika ;   et al.
2020-07-09
Low Contact Resistance Graphene Device Integration
App 20200211849 - Colombo; Luigi ;   et al.
2020-07-02
Multi-super Lattice For Switchable Arrays
App 20200203483 - COOK; Benjamin Stassen ;   et al.
2020-06-25
Graphene Fet With Graphitic Interface Layer At Contacts
App 20200185498 - COLOMBO; LUIGI ;   et al.
2020-06-11
Precision capacitor
Grant 10,644,098 - Fernandes , et al.
2020-05-05
Graphene FET with graphitic interface layer at contacts
Grant 10,593,763 - Colombo , et al.
2020-03-17
Integration Of Graphene And Boron Nitride Hetero-structure Device
App 20200075779 - Venugopal; Archana ;   et al.
2020-03-05
Integrated circuit nanoparticle thermal routing structure over interconnect region
Grant 10,529,641 - Venugopal , et al. J
2020-01-07
Ic With 3d Metal-insulator-metal Capacitor
App 20200006471 - FERNANDES; POORNIKA ;   et al.
2020-01-02
Integration of graphene and boron nitride hetero-structure device
Grant 10,490,673 - Venugopal , et al. Nov
2019-11-26
Integration of heat spreader for beol thermal management
Grant 10,468,324 - Venugopal , et al. No
2019-11-05
Integration of graphene and boron nitrite hetero-structure device over semiconductor layer
App 20190288122 - Venugopal; Archana ;   et al.
2019-09-19
Integration Of Graphene And Boron Nitride Hetero-structure Device
App 20190273166 - Venugopal; Archana ;   et al.
2019-09-05
Precision Capacitor
App 20190259826 - Fernandes; Poornika ;   et al.
2019-08-22
Precision Capacitor
App 20190259827 - Fernandes; Poornika ;   et al.
2019-08-22
Interconnect Via With Grown Graphitic Material
App 20190229051 - Venugopal; Archana ;   et al.
2019-07-25
Hexagonal Boron Nitride Structures
App 20190202696 - COLOMBO; Luigi ;   et al.
2019-07-04
Dissimilar Material Interface Having Lattices
App 20190206793 - VENUGOPAL; Archana ;   et al.
2019-07-04
Filler Particles For Polymers
App 20190202958 - DADVAND; Nazila ;   et al.
2019-07-04
Gas Sensor With Superlattice Structure
App 20190204252 - VENUGOPAL; Archana ;   et al.
2019-07-04
Hall Sensor Array
App 20190204395 - VENUGOPAL; Archana ;   et al.
2019-07-04
Lattice Bump Interconnect
App 20190206788 - COOK; Benjamin Stassen ;   et al.
2019-07-04
Multi-layered Sp2-bonded Carbon Tubes
App 20190202700 - COOK; Benjamin Stassen ;   et al.
2019-07-04
Metal-graphene Structures
App 20190207002 - COLOMBO; Luigi ;   et al.
2019-07-04
SP2-Bonded Carbon Structures
App 20190202174 - COLOMBO; Luigi ;   et al.
2019-07-04
Integration of graphene and boron nitride hetero-structure device over semiconductor layer
Grant 10,304,967 - Venugopal , et al.
2019-05-28
Graphene Fet With Graphitic Interface Layer At Contacts
App 20190115433 - COLOMBO; LUIGI ;   et al.
2019-04-18
Interconnect via with grown graphitic material
Grant 10,256,188 - Venugopal , et al.
2019-04-09
Graphene heterolayers for electronic applications
Grant 10,181,521 - Venugopal , et al. Ja
2019-01-15
Graphene FET with graphitic interface layer at contacts
Grant 10,181,516 - Colombo , et al. Ja
2019-01-15
Low Contact Resistance Graphene Device Integration
App 20180308696 - Colombo; Luigi ;   et al.
2018-10-25
Methods of forming graphene single crystal domains on a low nucleation site density substrate
Grant 10,072,355 - Colombo , et al. September 11, 2
2018-09-11
Low noise graphene hall sensors, systems and methods of making and using same
Grant 10,069,065 - Polley , et al. September 4, 2
2018-09-04
Graphene Heterolayers For Electronic Applications
App 20180240886 - Venugopal; Archana ;   et al.
2018-08-23
Low-offset Graphene Hall sensor
Grant 10,001,529 - Polley , et al. June 19, 2
2018-06-19
Interconnect Via With Grown Graphitic Material
App 20180151487 - Venugopal; Archana ;   et al.
2018-05-31
Semicondctor Device Package Thermal Conduit
App 20180151467 - Venugopal; Archana ;   et al.
2018-05-31
Integrated Circuit Nanoparticle Thermal Routing Structure Over Interconnect Region
App 20180151463 - Venugopal; Archana ;   et al.
2018-05-31
Integrated Circuit Nanoparticle Thermal Routing Structure In Interconnect Region
App 20180151470 - Cook; Benjamin Stassen ;   et al.
2018-05-31
Thermal Routing Trench By Additive Processing
App 20180151464 - Cook; Benjamin Stassen ;   et al.
2018-05-31
High Thermal Conductivity Vias By Additive Processing
App 20180151471 - Cook; Benjamin Stassen ;   et al.
2018-05-31
Graphene Fet With Graphitic Interface Layer At Contacts
App 20180130882 - COLOMBO; LUIGI ;   et al.
2018-05-10
Graphene FET with graphitic interface layer at contacts
Grant 9,882,008 - Colombo , et al. January 30, 2
2018-01-30
Heterostructure interconnects for high frequency applications
Grant 9,793,214 - Venugopal , et al. October 17, 2
2017-10-17
Integration of backside heat spreader for thermal management
Grant 9,698,075 - Venugopal , et al. July 4, 2
2017-07-04
Graphene Fet With Graphitic Interface Layer At Contacts
App 20170133468 - COLOMBO; LUIGI ;   et al.
2017-05-11
Low-Offset Graphene Hall Sensor
App 20170067970 - Polley; Arup ;   et al.
2017-03-09
Applying spatial gradient magnetic field to metallic/semiconducting SWNTs in fluid
Grant 9,517,938 - Wainerdi , et al. December 13, 2
2016-12-13
Integration of backside heat spreader for thermal management
Grant 9,496,198 - Venugopal , et al. November 15, 2
2016-11-15
Integration Of Backside Heat Spreader For Thermal Management
App 20160322277 - Venugopal; Archana ;   et al.
2016-11-03
Integration Of Heat Spreader For Beol Thermal Management
App 20160300775 - Venugopal; Archana ;   et al.
2016-10-13
Low Noise Graphene Hall Sensors, Systems And Methods Of Making And Using Same
App 20160293834 - Polley; Arup ;   et al.
2016-10-06
Integration of heat spreader for beol thermal management
Grant 9,397,023 - Venugopal , et al. July 19, 2
2016-07-19
Integration Of Backside Heat Spreader For Thermal Management
App 20160093552 - Venugopal; Archana ;   et al.
2016-03-31
Integration Of Heat Spreader For Beol Thermal Management
App 20160093551 - Venugopal; Archana ;   et al.
2016-03-31
Method And Apparatus For Sorting Carbon Nanotubes
App 20150307355 - Wainerdi; James Cooper ;   et al.
2015-10-29
Methods Of Forming Graphene Single Crystal Domains
App 20150292112 - Colombo; Luigi ;   et al.
2015-10-15
Separating Metallic and Semiconductor SWNTS with sinusoidal dipole-inducing magnetic fields
Grant 9,114,995 - Wainerdi , et al. August 25, 2
2015-08-25
Method And Apparatus For Sorting Carbon Nanotubes
App 20140291211 - Wainerdi; James Cooper ;   et al.
2014-10-02
Pull down bed with automatic locking device
Grant 8,800,077 - Colombo August 12, 2
2014-08-12
Separating metallic and semiconductor SWNTs with varying dipole-inducing magnetic fields
Grant 8,789,705 - Wainerdi , et al. July 29, 2
2014-07-29
Grown carbon nanotube die attach structures, articles, devices, and processes for making them
Grant 8,753,924 - Wainerdi , et al. June 17, 2
2014-06-17
Semiconductor device fabricated using a metal microstructure control process
Grant 8,575,014 - Colombo , et al. November 5, 2
2013-11-05
Grown Carbon Nanotube Die Attach Structures, Articles, Devices, And Processes For Making Them
App 20130234313 - Wainerdi; James Cooper ;   et al.
2013-09-12
Graphene synthesis by chemical vapor deposition
Grant 8,470,400 - Colombo , et al. June 25, 2
2013-06-25
Synthesizing graphene from metal-carbon solutions using ion implantation
Grant 8,461,028 - Colombo , et al. June 11, 2
2013-06-11
Synthesizing Graphene From Metal-carbon Solutions Using Ion Implantation
App 20130026444 - Colombo; Luigi ;   et al.
2013-01-31
Pull-down Bed Assembly
App 20130019399 - Colombo; Luigi
2013-01-24
Synthesizing graphene from metal-carbon solutions using ion implantation
Grant 8,309,438 - Colombo , et al. November 13, 2
2012-11-13
Method of Setting a Work Function of a Fully Silicided Semiconductor Device, and Related Device
App 20120231590 - Colombo; Luigi ;   et al.
2012-09-13
Dalbavancin Compositions For Treatment Of Bacterial Infections
App 20120184497 - STOGNIEW; Martin ;   et al.
2012-07-19
Semiconductor Device Fabricated Using A Metal Microstructure Control Process
App 20120164820 - Colombo; Luigi ;   et al.
2012-06-28
Method to maximize nitrogen concentration at the top surface of gate dielectrics
Grant 8,198,184 - Chambers , et al. June 12, 2
2012-06-12
Establishing a uniformly thin dielectric layer on graphene in a semiconductor device without affecting the properties of graphene
Grant 8,198,707 - Colombo , et al. June 12, 2
2012-06-12
Dalbavancin compositions for treatment of bacterial infections
Grant 8,143,212 - Stogniew , et al. March 27, 2
2012-03-27
Pull Down Bed With Automatic Locking Device
App 20120060279 - Colombo; Luigi
2012-03-15
Semiconductor device fabricated using a metal microstructure control process
Grant 8,124,529 - Colombo , et al. February 28, 2
2012-02-28
Gate structure and method
Grant 8,021,990 - Rotondaro , et al. September 20, 2
2011-09-20
Method And Apparatus For Sorting Carbon Nanotubes
App 20110132810 - Wainerdi; James Cooper ;   et al.
2011-06-09
Method And Apparatus For Sorting Carbon Nanotubes
App 20110132811 - Wainerdi; James Cooper ;   et al.
2011-06-09
Method of Setting a Work Function of a Fully Silicided Semiconductor Device, and Related Device
App 20110111586 - Colombo; Luigi ;   et al.
2011-05-12
Graphene Synthesis By Chemical Vapor Deposition
App 20110091647 - Colombo; Luigi ;   et al.
2011-04-21
Dual work function CMOS devices utilizing carbide based electrodes
Grant 7,842,567 - Chambers , et al. November 30, 2
2010-11-30
Formation of uniform silicate gate dielectrics
Grant 7,799,668 - Niimi , et al. September 21, 2
2010-09-21
Synthesizing Graphene From Metal-carbon Solutions Using Ion Implantation
App 20100224851 - Colombo; Luigi ;   et al.
2010-09-09
Method of Setting a Work Function of a Fully Silicided Semiconductor Device, and Related Device
App 20100187613 - Colombo; Luigi ;   et al.
2010-07-29
Establishing A Uniformly Thin Dielectric Layer On Graphene In A Semiconductor Device Without Affecting The Properties Of Graphene
App 20100181655 - Colombo; Luigi ;   et al.
2010-07-22
Two Step Method To Create A Gate Electrode Using A Physical Vapor Deposited Layer And A Chemical Vapor Deposited Layer
App 20100155860 - Colombo; Luigi ;   et al.
2010-06-24
Method to Maximize Nitrogen Concentration at the Top Surface of Gate Dielectrics
App 20100078738 - CHAMBERS; James Joseph ;   et al.
2010-04-01
Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
Grant 7,642,146 - Chambers , et al. January 5, 2
2010-01-05
Dalbavancin Compositions For Treatment Of Bacterial Infections
App 20090305953 - Colombo; Luigi ;   et al.
2009-12-10
Dalbavancin Compositions For Treatment Of Bacterial Infections
App 20090298749 - Stogniew; Martin ;   et al.
2009-12-03
Structure for dual work function metal gate electrodes by control of interface dipoles
Grant 7,612,422 - Chambers , et al. November 3, 2
2009-11-03
Defect control in gate dielectrics
Grant 7,601,578 - Colombo , et al. October 13, 2
2009-10-13
Work function control of metals
Grant 7,601,577 - Chambers , et al. October 13, 2
2009-10-13
Gate Structure And Method
App 20090227117 - Rotondaro; Antonio L.P. ;   et al.
2009-09-10
Gate structure and method
Grant 7,535,066 - Rotondaro , et al. May 19, 2
2009-05-19
Methods for fabricating MOS transistor gates with doped silicide
Grant 7,531,400 - Visokay , et al. May 12, 2
2009-05-12
Dual work function metal gate integration in semiconductor devices
Grant 7,528,024 - Colombo , et al. May 5, 2
2009-05-05
Integration Method For Dual Doped Polysilicon Gate Profile And Cd Control
App 20090104745 - Hong; Hyesook ;   et al.
2009-04-23
Dual Work Function Cmos Devices Utilizing Carbide Based Electrodes
App 20090068828 - Chambers; James Joseph ;   et al.
2009-03-12
Method Of Setting A Work Function Of A Fully Silicided Semiconductor Device, And Related Device
App 20090053883 - COLOMBO; Luigi ;   et al.
2009-02-26
Dual work function CMOS devices utilizing carbide based electrodes
Grant 7,470,577 - Chambers , et al. December 30, 2
2008-12-30
Gate dielectric and method
Grant 7,449,385 - Rotondaro , et al. November 11, 2
2008-11-11
Integrated circuits with composite gate dielectric
Grant 7,423,326 - Rotondaro , et al. September 9, 2
2008-09-09
Structure And Method For Dual Work Function Metal Gate Electrodes By Control Of Interface Dipoles
App 20080157228 - Chambers; James Joseph ;   et al.
2008-07-03
Refractory metal-based electrodes for work function setting in semiconductor devices
Grant 7,387,956 - Colombo , et al. June 17, 2
2008-06-17
Integrated circuit and method
Grant 7,361,599 - Moise , et al. April 22, 2
2008-04-22
Method for controlling defects in gate dielectrics
Grant 7,351,626 - Colombo , et al. April 1, 2
2008-04-01
Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon
Grant 7,351,632 - Visokay , et al. April 1, 2
2008-04-01
Defect Control in Gate Dielectrics
App 20080057739 - Colombo; Luigi ;   et al.
2008-03-06
Method for manufacturing dual work function gate electrodes through local thickness-limited silicidation
Grant 7,338,865 - Murto , et al. March 4, 2
2008-03-04
Work Function Control Of Metals
App 20080044957 - Chambers; James Joseph ;   et al.
2008-02-21
Refractory metal-based electrodes for work function setting in semiconductor devices
Grant 7,321,154 - Colombo , et al. January 22, 2
2008-01-22
Semiconductor Device Having Multiple Work Functions and Method of Manufacture Therefor
App 20070284676 - Alshareef; Husam N. ;   et al.
2007-12-13
Semiconductor Device Fabricated Using A Metal Microstructure Control Process
App 20070278584 - Colombo; Luigi ;   et al.
2007-12-06
Work function control of metals
Grant 7,291,527 - Chambers , et al. November 6, 2
2007-11-06
Gate dielectric and method
Grant 7,291,890 - Visokay , et al. November 6, 2
2007-11-06
Dual work function gate electrodes using doped polysilicon and a metal silicon germanium compound
Grant 7,233,035 - Rotondaro , et al. June 19, 2
2007-06-19
Process for manufacturing dual work function metal gates in a microelectronics device
Grant 7,229,873 - Colombo , et al. June 12, 2
2007-06-12
Semiconductor device having multiple work functions and method of manufacture therefor
Grant 7,226,826 - Alshareef , et al. June 5, 2
2007-06-05
Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS dielectric formation
Grant 7,226,830 - Colombo , et al. June 5, 2
2007-06-05
Semiconductor CMOS Devices and Methods with NMOS High-K Dielectric Present in Core Region that Mitigate Damage to Dielectric Materials
App 20070122962 - Chambers; James Joseph ;   et al.
2007-05-31
Method for fabricating transistor gate structures and gate dielectrics thereof
App 20070072364 - Visokay; Mark R. ;   et al.
2007-03-29
Method for fabricating transistor gate structures and gate dielectrics thereof
App 20070072363 - Visokay; Mark R. ;   et al.
2007-03-29
MOS Transistor Gates with Doped Silicide and Methods for Making the Same
App 20070059872 - Visokay; Mark ;   et al.
2007-03-15
Work function control of metals
App 20070054446 - Chambers; James Joseph ;   et al.
2007-03-08
Method of fabricating a semiconductor having dual gate electrodes using a composition-altered metal layer
Grant 7,183,221 - Visokay , et al. February 27, 2
2007-02-27
Formation of uniform silicate gate dielectrics
App 20070042555 - Niimi; Hiroaki ;   et al.
2007-02-22
Process for manufacturing dual work function metal gates in a microelectronics device
App 20070037343 - Colombo; Luigi ;   et al.
2007-02-15
Dual work function CMOS devices utilizing carbide based electrodes
App 20070037335 - Chambers; James Joseph ;   et al.
2007-02-15
Work function separation for fully silicided gates
App 20070037333 - Colombo; Luigi ;   et al.
2007-02-15
Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
Grant 7,176,076 - Chambers , et al. February 13, 2
2007-02-13
Method and system for modifying a gate dielectric stack containing a high-k layer using plasma processing
Grant 7,163,877 - Niimi , et al. January 16, 2
2007-01-16
Dual Work Function Gate Electrodes Using Doped Polysilicon And A Metal Silicon Germanium Compound
App 20060292790 - Rotondaro; Antonio L. P. ;   et al.
2006-12-28
MOS transistor gates with doped silicide and methods for making the same
Grant 7,148,546 - Visokay , et al. December 12, 2
2006-12-12
Refractory Metal-based Electrodes For Work Function Setting In Semiconductor Devices
App 20060273414 - Colombo; Luigi ;   et al.
2006-12-07
Refractory Metal-based Electrodes For Work Function Setting In Semiconductor Devices
App 20060267119 - Colombo; Luigi ;   et al.
2006-11-30
Methods that mitigate excessive source/drain silicidation in full gate silicidation metal gate flows
App 20060258074 - Visokay; Mark Robert ;   et al.
2006-11-16
Method for fabricating transistor gate structures and gate dielectrics thereof
Grant 7,135,361 - Visokay , et al. November 14, 2
2006-11-14
MOS Transistor Gates with Doped Silicide and Methods for Making the Same
App 20060244045 - Visokay; Mark ;   et al.
2006-11-02
Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS dielectric formation
App 20060246716 - Colombo; Luigi ;   et al.
2006-11-02
Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
App 20060246651 - Chambers; James Joseph ;   et al.
2006-11-02
Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon
App 20060246647 - Visokay; Mark Robert ;   et al.
2006-11-02
Top surface roughness reduction of high-k dielectric materials using plasma based processes
Grant 7,115,530 - Quevedo-Lopez , et al. October 3, 2
2006-10-03
Dual work function gate electrodes using doped polysilicon and a metal silicon germanium compound
Grant 7,109,077 - Rotondaro , et al. September 19, 2
2006-09-19
Semiconductor structure and method of fabrication
App 20060202300 - Visokay; Mark R. ;   et al.
2006-09-14
Gate structure and method
Grant 7,105,891 - Visokay , et al. September 12, 2
2006-09-12
Refractory metal-based electrodes for work function setting in semiconductor devices
Grant 7,098,516 - Colombo , et al. August 29, 2
2006-08-29
Encapsulated MOS transistor gate structures and methods for making the same
Grant 7,091,119 - Colombo August 15, 2
2006-08-15
Control of high-k gate dielectric film composition profile for property optimization
Grant 7,071,519 - Colombo , et al. July 4, 2
2006-07-04
Gate dielectric and method
App 20060138556 - Visokay; Mark R. ;   et al.
2006-06-29
Hydrogen free integration of high-k gate dielectrics
Grant 7,067,434 - Colombo , et al. June 27, 2
2006-06-27
Top surface roughness reduction of high-k dielectric materials using plasma based processes
App 20060121744 - Quevedo-Lopez; Manuel A. ;   et al.
2006-06-08
MOS transistor gates with thin lower metal silicide and methods for making the same
Grant 7,045,456 - Murto , et al. May 16, 2
2006-05-16
Method for integrating high-k dielectrics in transistor devices
Grant 7,045,431 - Rotondaro , et al. May 16, 2
2006-05-16
Dalbavancin compositions for treatment of bacterial infections
App 20060074014 - Stogniew; Martin ;   et al.
2006-04-06
Gate dielectric and method
Grant 7,018,902 - Visokay , et al. March 28, 2
2006-03-28
Encapsulated MOS transistor gate structures and methods for making the same
Grant 7,015,534 - Colombo March 21, 2
2006-03-21
High-K gate dielectric defect gettering using dopants
Grant 7,015,088 - Colombo , et al. March 21, 2
2006-03-21
Method and system for modifying a gate dielectric stack containing a high-k layer using plasma processing
App 20060040483 - Niimi; Hiroaki ;   et al.
2006-02-23
Dual work function gate electrodes obtained through local thickness-limited silicidation
App 20060019437 - Murto; Robert W. ;   et al.
2006-01-26
Method for fabricating split gate transistor device having high-k dielectrics
Grant 6,979,623 - Rotondaro , et al. December 27, 2
2005-12-27
Refractory metal-based electrodes for work function setting in semiconductor devices
App 20050258500 - Colombo, Luigi ;   et al.
2005-11-24
Dual work function metal gate integration in semiconductor devices
App 20050258468 - Colombo, Luigi ;   et al.
2005-11-24
Semiconductor device having multiple work functions and method of manufacture therefor
App 20050233533 - Alshareef, Husam N. ;   et al.
2005-10-20
Integrated circuit and method
App 20050227378 - Moise, Theodore S. ;   et al.
2005-10-13
Gate dielectric and method
App 20050205948 - Rotondaro, Antonio L.P. ;   et al.
2005-09-22
Metal gate MOS transistors and methods for making the same
Grant 6,936,508 - Visokay , et al. August 30, 2
2005-08-30
Gate dielectric and method
Grant 6,919,251 - Rotondaro , et al. July 19, 2
2005-07-19
Hydrogen Free Integration Of High-k Gate Dielectrics
App 20050136679 - Colombo, Luigi ;   et al.
2005-06-23
Method for integrating high-k dielectrics in transistor devices
App 20050136589 - Rotondaro, Antonio L.P. ;   et al.
2005-06-23
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Hydrogen free formation of gate electrodes
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Defect control in gate dielectrics
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MOS transistor gates with thin lower metal silicide and methods for making the same
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Method of fabricating a dielectric layer for a semiconductor structure
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Dalbavancin compositions for treatment of bacterial infections
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Method for fabricating transistor gate structures and gate dielectrics thereof
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2005-06-16
Top surface roughness reduction of high-k dielectric materials using plasma based processes
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2005-06-09
Anneal of high-k dielectric using NH3 and an oxidizer
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2005-06-09
Integrated circuit and method
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2005-06-07
Encapsulated MOS transistor gate structures and methods for making the same
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2005-05-19
Semiconductor structure and method of fabrication
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2005-05-12
Dalbavancin compositions for treatment of bacterial infections
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Encapsulated MOS transistor gate structures and methods for making the same
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Use of amorphous aluminum oxide on a capacitor sidewall for use as a hydrogen barrier
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MOS transistor gates with doped silicide and methods for making the same
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Metal gate MOS transistors and methods for making the same
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High temperature interface layer growth for high-k gate dielectric
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Gate structure and method
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Multistage deposition that incorporates nitrogen via an intermediate step
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2004-12-07
Method of forming an FeRAM having a multi-layer hard mask and patterning thereof
Grant 6,828,161 - Summerfelt , et al. December 7, 2
2004-12-07
High temperature interface layer growth for high-k gate dielectric
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Anneal sequence for high-.kappa. film property optimization
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High-k gate dielectric with uniform nitrogen profile and methods for making the same
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2004-10-26
Gate structure and method
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Gate structure and method
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High temperature interface layer growth for high-k gate dielectric
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2004-08-19
Method of making multiple work function gates by implanting metals with metallic alloying additives
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2004-08-03
Multistage deposition that incorporates nitrogen via an intermediate step
App 20040132315 - Chambers, James Joseph ;   et al.
2004-07-08
Control of high -k gate dielectric film composition profile for property optimization
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2004-07-08
Methods for forming interfacial layer for deposition of high-k dielectrics
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2004-07-01
High-K gate dielectric defect gettering using dopants
App 20040127000 - Colombo, Luigi ;   et al.
2004-07-01
Methods for sputter deposition of high-k dielectric films
Grant 6,750,126 - Visokay , et al. June 15, 2
2004-06-15
Dual work function gate electrodes using doped polysilicon and a metal silicon germanium compound
App 20040099916 - Rotondaro, Antonio L. P. ;   et al.
2004-05-27
Use Of Amorphous Aluminum Oxide On A Capacitor Sidewall For Use As A Hydrogen Barrier
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2004-05-27
Contamination control for embedded ferroelectric device fabrication processes
Grant 6,709,875 - Gilbert , et al. March 23, 2
2004-03-23
Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing
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2004-02-24
Gate dielectric and method
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2004-02-05
Gate dielectric and method
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2004-01-29
Gate structure and method
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2004-01-15
CVD deposition of M-ON gate dielectrics
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2004-01-01
Method of planarizing a conductive plug situated under a ferroelectric capacitor
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2003-10-21
Method of patterning a FeRAM capacitor with a sidewall during bottom electrode etch
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2003-10-21
Gate structure and method
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2003-09-04
Gate structure and method
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2003-08-07
Integrated circuit capacitor and memory
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2003-07-29
Anneal sequence for high-k film property optimization
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2003-07-10
Method of forming an FeRAM having a multi-layer hard mask and patterning thereof
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2003-07-03
Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing
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2003-06-26
Method Of Patterning A Feram Capacitor With A Sidewall During Bottom Electrode Etch
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2003-06-26
CVD deposition of M-SION gate dielectrics
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2003-06-19
Oxynitride device and method using non-stoichiometric silicon oxide
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2003-06-12
Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications
Grant 6,576,546 - Gilbert , et al. June 10, 2
2003-06-10
Multiple work function gates
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2003-06-05
Gate dielectric and method
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2003-06-05
Method of fabricating a ferroelectric memory cell
Grant 6,548,343 - Summerfelt , et al. April 15, 2
2003-04-15
Integrated circuit and method
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2003-04-10
Annealing of high-k dielectric materials
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2003-04-08
Hardmask designs for dry etching FeRAM capacitor stacks
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2003-03-18
Gate structure and method
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2003-03-06
Protection of tungsten alignment mark for FeRAM processing
Grant 6,528,386 - Summerfelt , et al. March 4, 2
2003-03-04
Contamination control for embedded ferroelectric device fabrication processes
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2003-02-20
Integrated circuit and method
Grant 6,444,542 - Moise , et al. September 3, 2
2002-09-03
Annealing of high-K dielectric materials
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2002-06-27
Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications
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2002-06-13
Integrated circuit and method
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2001-12-27
Method of planarizing a conductive plug situated under a ferroelectric capacitor
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2001-11-22
Hardmask designs for dry etching FeRAM capacitor stacks
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2001-10-25
Integrated circuit and method
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2001-04-03
Adhesion promoting sacrificial etch stop layer in advanced capacitor structures
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