Collins; Hansel A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Collins; Hansel A..The latest application filed is for "multiple-input, single-exit delay line architecture".

Company Profile

0.9.3

Collins; Hansel A. - Mountain View CA
Collins; Hansel A. - Clinton MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multiple-input, single-exit delay line architecture Grant 7,173,468 - Collins , et al. February 6, 2	2007-02-06
Multiple-input, single-exit delay line architecture App 20060066372 - Collins; Hansel A. ; et al.	2006-03-30
Relative dynamic skew compensation of parallel data lines App 20050229049 - Collins, Hansel A.	2005-10-13
Relative dynamic skew compensation of parallel data lines Grant 6,907,552 - Collins June 14, 2	2005-06-14
Relative dynamic skew compensation of parallel data lines App 20030046618 - Collins, Hansel A.	2003-03-06
System and method to reduce jitter in digital delay-locked loops Grant 5,790,612 - Chengson , et al. August 4, 1	1998-08-04
Memory bank management and arbitration in multiprocessor computer system Grant 5,412,788 - Collins , et al. May 2, 1	1995-05-02
Method and apparatus for clock skew reduction through remote delay regulation Grant 5,369,640 - Watson , et al. November 29, 1	1994-11-29
Method and apparatus for performing diagnosis scanning of a memory unit regardless of the state of the system clock and without affecting the store data Grant 5,313,623 - Chinnaswamy , et al. May 17, 1	1994-05-17
Method and apparatus for clock skew reduction through absolute delay regulation Grant 5,309,035 - Watson, Jr. , et al. * May 3, 1	1994-05-03
Method and apparatus for clock skew reduction through absolute delay regulation Grant 5,272,390 - Watson, Jr. , et al. December 21, 1	1993-12-21
Memory selftest method and apparatus same Grant 5,033,048 - Pierce , et al. July 16, 1	1991-07-16

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