Cline; Ronald L

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cline; Ronald L.The latest application filed is for "memory circuit having non-volatile memory cell and methods of using".

Company Profile

3.16.4

Cline; Ronald L - San Jose CA
Cline; Ronald L. - San Jose CA
Cline; Ronald L. - Tijeras NM
Cline; Ronald L. - Albuquerque NM
Cline; Ronald L. - Los Gatos CA
Cline; Ronald L. - Monte Sereno CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory circuit having non-volatile memory cell and methods of using Grant RE48,625 - Cline , et al. July 6, 2	2021-07-06
Memory circuit having non-volatile memory cell and methods of using Grant RE48,570 - Cline , et al. May 25, 2	2021-05-25
Memory circuit having non-volatile memory cell and methods of using Grant 10,559,357 - Cline Feb	2020-02-11
Memory Circuit Having Non-volatile Memory Cell And Methods Of Using App 20200043553 - Cline; Ronald L.	2020-02-06
Low Latency Interrupt Alerts For Artificial Neural Network Systems And Methods App 20190279100 - Cline; Ronald L.	2019-09-12
Selective power gating of routing resource configuration memory bits for programmable logic devices Grant 10,079,054 - Gunaratna , et al. September 18, 2	2018-09-18
Memory circuit having non-volatile memory cell and methods of using Grant 9,672,935 - Cline , et al. June 6, 2	2017-06-06
Memory Circuit Having Non-volatile Memory Cell And Methods Of Using App 20160111168 - Cline; Ronald L. ; et al.	2016-04-21
Method for determining critical junction temperature Grant 8,694,939 - Frost , et al. April 8, 2	2014-04-08
Bistable circuit with metastability resistance Grant 8,330,517 - Cline December 11, 2	2012-12-11
Programmable integrated circuit with voltage domains Grant 8,159,263 - Tuan , et al. April 17, 2	2012-04-17
Integrated circuit with a selectable interconnect circuit for low power or high performance operation Grant 7,893,712 - Tan , et al. February 22, 2	2011-02-22
Programmable differential signaling system Grant 7,479,805 - Zhou , et al. January 20, 2	2009-01-20
Programmable differential signaling system Grant 7,265,586 - Zhou , et al. September 4, 2	2007-09-04
Overvoltage clamp circuit Grant 6,985,019 - Zhou , et al. January 10, 2	2006-01-10
High-speed, low current level shifter circuits for integrated circuits having multiple power supplies Grant 6,842,043 - Nguyen , et al. January 11, 2	2005-01-11
Very fine grain field programmable gate array architecture and circuitry App 20020011868 - Cline, Ronald L.	2002-01-31
Method for manufacturing programmable read-only memory containing cells formed with opposing diodes Grant 4,694,566 - Conner , et al. September 22, 1	1987-09-22
CMOS programmable logic array Grant 4,652,777 - Cline March 24, 1	1987-03-24
Gate having temperature-stabilized delay Grant 4,651,038 - Cline , et al. March 17, 1	1987-03-17

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