loadpatents
Patent applications and USPTO patent grants for Clerc; Sylvain.The latest application filed is for "digital circuit monitoring device".
Patent | Date |
---|---|
Device, method and system of error detection and correction in multiple devices Grant 11,385,288 - Gomez Gomez , et al. July 12, 2 | 2022-07-12 |
Digital Circuit Monitoring Device App 20210278461 - GOMEZ GOMEZ; Ricardo ;   et al. | 2021-09-09 |
Error Detection And Correction App 20210096183 - GOMEZ GOMEZ; Ricardo ;   et al. | 2021-04-01 |
Method and device for testing a chain of flip-flops Grant 10,684,326 - Clerc , et al. | 2020-06-16 |
Method and device for monitoring a critical path of an integrated circuit Grant 10,451,670 - Clerc Oc | 2019-10-22 |
Method And Device For Testing A Chain Of Flip-flops App 20180321308 - Clerc; Sylvain ;   et al. | 2018-11-08 |
Method and device for testing a chain of flip-flops Grant 10,048,317 - Clerc , et al. August 14, 2 | 2018-08-14 |
Method And Device For Monitoring A Critical Path Of An Integrated Circuit App 20170299651 - Clerc; Sylvain | 2017-10-19 |
Radiation-hardened CMOS logic device Grant 9,748,955 - Gasiot , et al. August 29, 2 | 2017-08-29 |
Method And Device For Testing A Chain Of Flip-flops App 20170227602 - Clerc; Sylvain ;   et al. | 2017-08-10 |
Device for generating a clock signal by frequency multiplication Grant 9,634,671 - Cochet , et al. April 25, 2 | 2017-04-25 |
Method for controlling an integrated circuit Grant 9,479,168 - Giraud , et al. October 25, 2 | 2016-10-25 |
Method for managing the operation of a circuit with triple modular redundancy and associated device Grant 9,417,282 - Daveau , et al. August 16, 2 | 2016-08-16 |
Device For Generating A Clock Signal By Frequency Multiplication App 20160079984 - Cochet; Martin ;   et al. | 2016-03-17 |
Method For Managing The Operation Of A Circuit With Triple Modular Redundancy And Associated Device App 20150377962 - DAVEAU; Jean-Marc ;   et al. | 2015-12-31 |
Integrated circuit comprising a clock tree cell Grant 9,000,840 - Thonnart , et al. April 7, 2 | 2015-04-07 |
Integrated circuit comprising a clock tree cell Grant 8,937,505 - Giraud , et al. January 20, 2 | 2015-01-20 |
Radiation Hardened Circuit App 20140340133 - Gasiot; Gilles ;   et al. | 2014-11-20 |
SRAM read-write memory cell having ten transistors Grant 8,867,264 - Abouzeid , et al. October 21, 2 | 2014-10-21 |
Method For Controlling An Integrated Circuit App 20140292374 - Giraud; Bastien ;   et al. | 2014-10-02 |
Memory device Grant 8,837,206 - Glorieux , et al. September 16, 2 | 2014-09-16 |
Integrated Circuit Comprising A Clock Tree Cell App 20140176228 - Giraud; Bastien ;   et al. | 2014-06-26 |
Integrated Circuit Comprising A Clock Tree Cell App 20140176216 - Thonnart; Yvain ;   et al. | 2014-06-26 |
Method for protecting a logic circuit against external radiation and associated electronic device Grant 8,570,060 - Clerc , et al. October 29, 2 | 2013-10-29 |
Read boost circuit for memory device Grant 8,565,030 - Abouzeid , et al. October 22, 2 | 2013-10-22 |
Integrated circuit elementary cell with a low sensitivity to external disturbances Grant 8,497,701 - Clerc , et al. July 30, 2 | 2013-07-30 |
Memory Device App 20130121070 - Glorieux; Maximilien ;   et al. | 2013-05-16 |
Sram Read-write Memory Cell Having Ten Transistors App 20130051131 - Abouzeid; Fady ;   et al. | 2013-02-28 |
Integrated Circuit Elementary Cell with a Low Sensitivity to External Disturbances App 20130009665 - Clerc; Sylvain ;   et al. | 2013-01-10 |
Flip-flop with single clock phase and with reduced dynamic power Grant 8,339,172 - Firmin , et al. December 25, 2 | 2012-12-25 |
Read Boost Circuit For Memory Device App 20120081978 - Abouzeid; Fady ;   et al. | 2012-04-05 |
Method Of Synthesis Of An Electronic Circuit App 20120042292 - Abouzeid; Fady ;   et al. | 2012-02-16 |
Method for Protecting a Logic Circuit Against External Radiation and Associated Electronic Device App 20110291696 - Clerc; Sylvain ;   et al. | 2011-12-01 |
Flip-flop With Single Clock Phase And With Reduced Dynamic Power App 20110084748 - Firmin; Fabian ;   et al. | 2011-04-14 |
Synchronization pulse generator with forced output Grant 7,876,141 - Lasbouygues , et al. January 25, 2 | 2011-01-25 |
Bistable flip-flop having retention circuit for storing state in inactive mode Grant 7,564,282 - Clerc July 21, 2 | 2009-07-21 |
Pulse Generator App 20090146720 - Lasbouygues; Benoit ;   et al. | 2009-06-11 |
Multivibrator protected against current or voltage spikes Grant 7,321,506 - Roche , et al. January 22, 2 | 2008-01-22 |
Fast bistable circuit protected against random events Grant 7,236,031 - Clerc , et al. June 26, 2 | 2007-06-26 |
Multivibrator Protected Against Current Or Voltage Spikes App 20060255870 - Roche; Philippe ;   et al. | 2006-11-16 |
Bistable device of the edge-triggered flip-flop type App 20060109040 - Clerc; Sylvain | 2006-05-25 |
Fast bistable circuit protected against random events App 20050285650 - Clerc, Sylvain ;   et al. | 2005-12-29 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.