Churchill; Jonathan F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Churchill; Jonathan F..The latest application filed is for "verification of integrated circuit designs using buffer control".

Company Profile

0.9.0

Churchill; Jonathan F. - Reading GB
Churchill; Jonathan F. - Berkshire GB

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Verification of integrated circuit designs using buffer control Grant 6,981,238 - Churchill December 27, 2	2005-12-27
Dual tristate path output buffer control Grant 6,724,232 - Churchill April 20, 2	2004-04-20
Wordline and pseudo read stress test for SRAM Grant 6,392,941 - Churchill May 21, 2	2002-05-21
Direct bit line-bit line defect detection test mode for SRAM Grant 6,388,927 - Churchill , et al. May 14, 2	2002-05-14
Scan path circuitry including a programmable delay circuit Grant 6,286,118 - Churchill , et al. September 4, 2	2001-09-04
Scan path circuitry for programming a variable clock pulse width Grant 6,115,836 - Churchill , et al. September 5, 2	2000-09-05
Test mode features for synchronous pipelined memories Grant 6,006,347 - Churchill , et al. December 21, 1	1999-12-21
Scan path circuitry including an output register having a flow through mode Grant 5,953,285 - Churchill , et al. September 14, 1	1999-09-14
Method and circuit for preventing and/or inhibiting contention in a system employing a random access memory Grant 5,852,579 - Arcoleo , et al. December 22, 1	1998-12-22

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