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Patent applications and USPTO patent grants for Chung-Maloney; Wai Ling.The latest application filed is for "determining intra-die wirebond pad placement locations in integrated circuit".
Patent | Date |
---|---|
Determining intra-die wirebond pad placement locations in integrated circuit Grant 8,448,118 - Graf , et al. May 21, 2 | 2013-05-21 |
Determining Intra-die Wirebond Pad Placement Locations In Integrated Circuit App 20120216164 - Graf; Richard S. ;   et al. | 2012-08-23 |
Integrated Circuit (IC) Chip Input/Output (I/O) Cell Design Optimization Method And IC chip With Optimized I/O Cells App 20080201677 - Baker; Faye ;   et al. | 2008-08-21 |
Method and apparatus of optimizing the IO collar of a peripheral image Grant 7,266,789 - Chung-Maloney , et al. September 4, 2 | 2007-09-04 |
Method and apparatus for depopulating peripheral input/output cells Grant 7,194,707 - Chung-Maloney , et al. March 20, 2 | 2007-03-20 |
Method And Apparatus Of Optimizing The Io Collar Of A Peripheral Image App 20060225006 - Chung-Maloney; Wai Ling ;   et al. | 2006-10-05 |
Method And Apparatus For Depopulating Peripheral Input/output Cells App 20060064660 - Chung-Maloney; Wai Ling ;   et al. | 2006-03-23 |
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