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Patent applications and USPTO patent grants for CHUNG; Che-Liang.The latest application filed is for "forming gate line-end of semiconductor structures".
Patent | Date |
---|---|
Forming Gate Line-end Of Semiconductor Structures App 20210166972 - CHUNG; Che-Liang ;   et al. | 2021-06-03 |
Forming gate line-end of semiconductor structures Grant 10,943,822 - Chung , et al. March 9, 2 | 2021-03-09 |
Zone-based Cmp Target Control App 20200094369 - Chung; Che-Liang ;   et al. | 2020-03-26 |
Forming Gate Line-end Of Semiconductor Structures App 20190287852 - Chung; Che-Liang ;   et al. | 2019-09-19 |
Semiconductor device and method Grant 10,164,053 - Chung , et al. Dec | 2018-12-25 |
Advanced polishing system Grant 10,160,088 - Chung , et al. Dec | 2018-12-25 |
Advanced Polishing System App 20180043495 - Chung; Che-Liang ;   et al. | 2018-02-15 |
Advanced polishing system Grant 9,802,292 - Chung , et al. October 31, 2 | 2017-10-31 |
Advanced Polishing System App 20170239777 - Chung; Che-Liang ;   et al. | 2017-08-24 |
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