Chun; Sungjun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chun; Sungjun.The latest application filed is for "multicomponent module design and fabrication".

Company Profile

6.42.39

Chun; Sungjun - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multicomponent Module Design And Fabrication App 20220308564 - Peterson; Kirk D. ; et al.	2022-09-29
PCB with substrate integrated waveguides using multi-band monopole antenna feeds for high speed communication Grant 11,399,428 - Roy Paladhi , et al. July 26, 2	2022-07-26
Pcb With Substrate Integrated Waveguides Using Multi-band Monopole Antenna Feeds For High Speed Communication App 20210112655 - ROY PALADHI; Pavel ; et al.	2021-04-15
VERTICALLY TRANSITIONING BETWEEN SUBSTRATE INTEGRATED WAVEGUIDES (SIWs) WITHIN A MULTILAYERED PRINTED CIRCUIT BOARD (PCB) App 20210111472 - MYERS; JOSHUA C. ; et al.	2021-04-15
Signal via positioning in a multi-layer circuit board Grant 10,657,308 - Chun , et al.	2020-05-19
Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures Grant 10,375,820 - Choi , et al.	2019-08-06
Signal via positioning in a multi-layer circuit board using a genetic via placement solver Grant 10,223,490 - Chun , et al.	2019-03-05
Signal via positioning in a multi-layer circuit board using a genetic via placement solver Grant 10,216,884 - Chun , et al. Feb	2019-02-26
Method for fabricating a hybrid land grid array connector Grant 10,135,162 - Hejase , et al. November 20, 2	2018-11-20
Connector having a body with a conductive layer common to top and bottom surfaces of the body as well as to wall surfaces of a plurality of holes in the body Grant 10,128,593 - Hejase , et al. November 13, 2	2018-11-13
Crosstalk Reduction Between Signal Layers In A Multilayered Package By Variable-width Mesh Plane Structures App 20180213636 - CHOI; JINWOO ; et al.	2018-07-26
Method of making a printed circuit board copper plane repair Grant 9,980,382 - Bohra , et al. May 22, 2	2018-05-22
Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures Grant 9,955,567 - Choi , et al. April 24, 2	2018-04-24
Signal via positioning in a multi-layer circuit board Grant 9,940,426 - Chun , et al. April 10, 2	2018-04-10
Signal Via Positioning In A Multi-layer Circuit Board Using A Genetic Via Placement Solver App 20180075180 - Chun; Sungjun ; et al.	2018-03-15
Signal via positioning in a multi-layer circuit board Grant 9,916,410 - Chun , et al. March 13, 2	2018-03-13
Signal Via Positioning In A Multi-layer Circuit Board Using A Genetic Via Placement Solver App 20180068048 - Chun; Sungjun ; et al.	2018-03-08
Signal Via Positioning In A Multi-layer Circuit Board App 20180060478 - Chun; Sungjun ; et al.	2018-03-01
Signal via positioning in a multi-layer circuit board using a genetic via placement solver Grant 9,881,115 - Chun , et al. January 30, 2	2018-01-30
Signal via positioning in a multi-layer circuit board using a genetic via placement solver Grant 9,875,331 - Chun , et al. January 23, 2	2018-01-23
Signal Via Positioning In A Multi-layer Circuit Board Using A Genetic Via Placement Solver App 20170316139 - Chun; Sungjun ; et al.	2017-11-02
Signal Via Positioning In A Multi-layer Circuit Board Using A Genetic Via Placement Solver App 20170316141 - Chun; Sungjun ; et al.	2017-11-02
Signal Via Positioning In A Multi-layer Circuit Board App 20160371417 - Chun; Sungjun ; et al.	2016-12-22
Signal Via Positioning In A Multi-layer Circuit Board App 20160371416 - Chun; Sungjun ; et al.	2016-12-22
Printed circuit board copper plane repair Grant 9,485,866 - Bohra , et al. November 1, 2	2016-11-01
Managing interconnect electromigration effects Grant 9,477,568 - Allen-Ware , et al. October 25, 2	2016-10-25
Printed circuit board copper plane repair Grant 9,374,910 - Bohra , et al. June 21, 2	2016-06-21
276-pin buffered memory card with enhanced memory system interconnect Grant 9,357,649 - Chun , et al. May 31, 2	2016-05-31
Printed Circuit Board Copper Plane Repair App 20160150647 - Bohra; Mahesh ; et al.	2016-05-26
Printed Circuit Board Copper Plane Repair App 20150282331 - Bohra; Mahesh ; et al.	2015-10-01
Printed Circuit Board Copper Plane Repair App 20150189754 - Bohra; Mahesh ; et al.	2015-07-02
Managing Interconnect Electromigration Effects App 20150094995 - Allen-Ware; Malcolm S. ; et al.	2015-04-02
Multi-layer circuit substrate fabrication method providing improved transmission line integrity and increased routing density Grant 8,962,475 - Chun , et al. February 24, 2	2015-02-24
Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures Grant 8,927,879 - Choi , et al. January 6, 2	2015-01-06
Crosstalk Reduction Between Signal Layers In A Multilayered Package By Variable-width Mesh Plane Structures App 20140331482 - CHOI; JINWOO ; et al.	2014-11-13
System for designing substrates having reference plane voids with strip segments Grant 8,813,000 - Chun , et al. August 19, 2	2014-08-19
Multi-layer Circuit Substrate Fabrication Method Providing Improved Transmission Line Integrity And Increased Routing Density App 20140080300 - Chun; Sungjun ; et al.	2014-03-20
Noise coupling reduction and impedance discontinuity control in high-speed ceramic modules Grant 8,645,889 - Choi , et al. February 4, 2	2014-02-04
System For Designing Substrates Having Reference Plane Voids With Strip Segments App 20140033146 - Chun; Sungjun ; et al.	2014-01-30
Circuit manufacturing and design techniques for reference plane voids with strip segment Grant 8,638,567 - Chun , et al. January 28, 2	2014-01-28
Circuit manufacturing and design techniques for reference plane voids with strip segment Grant 8,625,300 - Chun , et al. January 7, 2	2014-01-07
Multi-layer circuit substrate fabrication and design methods providing improved transmission line integrity and increased routing density Grant 8,624,297 - Chun , et al. January 7, 2	2014-01-07
276-pin Buffered Memory Card With Enhanced Memory System Interconnect App 20130301207 - Chun; Sungjun ; et al.	2013-11-14
Reducing crosstalk in the design of module nets Grant 8,407,644 - Cabrera , et al. March 26, 2	2013-03-26
Circuit Manufacturing And Design Techniques For Reference Plane Voids With Strip Segment App 20120331430 - Chun; Sungjun ; et al.	2012-12-27
Circuit Manufacturing And Design Techniques For Reference Plane Voids With Strip Segment App 20120331429 - Chun; Sungjun ; et al.	2012-12-27
Circuit manufacturing and design techniques for reference plane voids with strip segment Grant 8,325,490 - Chun , et al. December 4, 2	2012-12-04
Noise coupling reduction and impedance discontinuity control in high-speed ceramic modules Grant 8,288,657 - Choi , et al. October 16, 2	2012-10-16
Redundant clock channel for high reliability connectors Grant 8,257,092 - Chun , et al. September 4, 2	2012-09-04
Noise Coupling Reduction and Impedance Discontinuity Control in High-Speed Ceramic Modules App 20120204141 - Choi; Jinwoo ; et al.	2012-08-09
Crosstalk Reduction Between Signal Layers In A Multilayered Package By Variable-width Mesh Plane Structures App 20120125677 - Choi; Jinwoo ; et al.	2012-05-24
Redundant Clock Channel For High Reliability Connectors App 20120120577 - Chun; Sungjun ; et al.	2012-05-17
Method of reducing crosstalk induced noise in circuitry designs Grant 7,945,881 - Chun , et al. May 17, 2	2011-05-17
Noise Coupling Reduction and Impedance Discontinuity Control in High-Speed Ceramic Modules App 20110083888 - Choi; Jinwoo ; et al.	2011-04-14
Reducing Crosstalk In The Design Of Module Nets App 20110031627 - Cabrera; Dulce M. Altabella ; et al.	2011-02-10
Detecting open ground connections in surface mount connectors Grant 7,868,608 - Haridass , et al. January 11, 2	2011-01-11
Reference plane voids with strip segment for improving transmission line integrity over vias Grant 7,821,796 - Chun , et al. October 26, 2	2010-10-26
Circuit Manufacturing And Design Techniques For Reference Plane Voids With Strip Segment App 20100261346 - Chun; Sungjun ; et al.	2010-10-14
Detecting Open Ground Connections in Surface Mount Connectors App 20100259289 - Haridass; Anand ; et al.	2010-10-14
Multi-layer Circuit Substrate Fabrication And Design Methods Providing Improved Transmission Line Integrity And Increased Routing Density App 20100035426 - Chun; Sungjun ; et al.	2010-02-11
Multi-layer circuit substrate and method having improved transmission line integrity and increased routing density Grant 7,646,082 - Chun , et al. January 12, 2	2010-01-12
Apparatus for Suppressing Mid-Frequency Noise in an Integrated Circuit Having Multiple Voltage Islands App 20090206680 - Chun; Sungjun ; et al.	2009-08-20
Reference Plane Voids with Strip Segment for Improving Transmission Line Integrity over Vias App 20090184784 - Chun; Sungjun ; et al.	2009-07-23
Method of Reducing Crosstalk Induced Noise in Circuitry Designs App 20090164962 - Chun; Sungjun ; et al.	2009-06-25
Multi-Layer Circuit Substrate and Method Having Improved Transmission Line Integrity and Increased Routing Density App 20080290474 - Chun; Sungjun ; et al.	2008-11-27
System and Method of Integrated Circuit Control for in Situ Impedance Measurement App 20080224714 - Virutchapunt; Tanit ; et al.	2008-09-18
System and method for noise reduction in multi-layer ceramic packages Grant 7,348,667 - Chun , et al. March 25, 2	2008-03-25
Measuring microprocessor susceptibility to internal noise generation Grant 7,313,747 - Chun , et al. December 25, 2	2007-12-25
Measuring microprocessor susceptibility to internal noise generation App 20070236299 - Chun; Sungjun ; et al.	2007-10-11
System and Method for Noise Reduction in Multi-Layer Ceramic Packages App 20070080436 - Chun; Sungjun ; et al.	2007-04-12
System and method for noise reduction in multi-layer ceramic packages App 20060214190 - Chun; Sungjun ; et al.	2006-09-28
Methodology for determining the placement of decoupling capacitors in a power distribution system Grant 6,789,241 - Anderson , et al. September 7, 2	2004-09-07
Methodology for determining the placement of decoupling capacitors in a power distribution system App 20040088661 - Anderson, Raymond E. ; et al.	2004-05-06

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