Chuang; Patrick T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chuang; Patrick T..The latest application filed is for "efficient method for implementing programmable impedance output drivers and programmable input on die termination on a bi-directional data bus".

Company Profile

0.16.6

Chuang; Patrick T. - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Systems and methods involving data inversion devices, circuitry, schemes and/or related aspects Grant 9,494,647 - Chuang , et al. November 15, 2	2016-11-15
Minimized line skew generator Grant 8,542,050 - Kim , et al. September 24, 2	2013-09-24
Efficient method for implementing programmable impedance output drivers and programmable input on die termination on a bi-directional data bus Grant 7,646,215 - Haig , et al. January 12, 2	2010-01-12
Dynamic dual control on-die termination Grant 7,595,657 - Haig , et al. September 29, 2	2009-09-29
Efficient method for implementing programmable impedance output drivers and programmable input on die termination on a bi-directional data bus App 20090237109 - Haig; Robert B. ; et al.	2009-09-24
Dynamic dual control on-die termination App 20080272800 - Haig; Robert ; et al.	2008-11-06
Shift registers free of timing race boundary scan registers with two-phase clock control Grant 7,389,457 - Chen , et al. June 17, 2	2008-06-17
Dynamic sense amplifier for SRAM Grant 7,313,040 - Huang , et al. December 25, 2	2007-12-25
Minimized line skew generator App 20070096790 - Kim; Jae-Hyeong ; et al.	2007-05-03
Shift registers free of timing race boundary scan registers with two-phase clock control App 20070101222 - Chen; Hsin-Ley Suzanne ; et al.	2007-05-03
Dynamic sense amplifier for SRAM App 20070097765 - Huang; Mu-Hsiang ; et al.	2007-05-03
Semiconductor device tester pin contact resistance measurement App 20070080697 - Tseng; Chih-Chiang ; et al.	2007-04-12
Noise reducing output buffer circuit with feedback path Grant 5,121,013 - Chuang , et al. June 9, 1	1992-06-09
Content addressable memory array with priority encoder Grant 4,928,260 - Chuang , et al. May 22, 1	1990-05-22
Content addressable memory array with maskable and resettable bits Grant 4,890,260 - Chuang , et al. December 26, 1	1989-12-26
Content addressable memory array system with multiplexed status and command information Grant 4,888,731 - Chuang , et al. December 19, 1	1989-12-19
Low power CMOS reference generator with low impedance driver Grant 4,634,894 - Shu , et al. January 6, 1	1987-01-06
Nonvolatile dynamic ram circuit Grant 4,615,020 - Rinerson , et al. September 30, 1	1986-09-30
Non-volatile dynamic RAM cell Grant 4,611,309 - Chuang , et al. September 9, 1	1986-09-09
Regulated substrate bias generator for random access memory Grant 4,438,346 - Chuang , et al. March 20, 1	1984-03-20
Sense amplification scheme for random access memory Grant 4,421,996 - Chuang , et al. December 20, 1	1983-12-20

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