loadpatents
name:-0.026699066162109
name:-0.027523040771484
name:-0.016425132751465
Chuang; Chiang-Ming Patent Filings

Chuang; Chiang-Ming

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chuang; Chiang-Ming.The latest application filed is for "semiconductor device".

Company Profile
14.28.29
  • Chuang; Chiang-Ming - Changhua TW
  • Chuang; Chiang-Ming - Changhua County TW
  • Chuang; Chiang-Ming - Hemei Township TW
  • Chuang; Chiang-Ming - Chunghua County TW
  • Chuang; Chiang-Ming - Hemei TW
  • Chuang; Chiang-Ming - Hemei Changhua TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor device
Grant 11,411,097 - Lin , et al. August 9, 2
2022-08-09
Semiconductor structure and method for forming the same
Grant 11,121,141 - Chuang , et al. September 14, 2
2021-09-14
Flash memory cell structure with step-shaped floating gate
Grant 11,018,233 - Chu , et al. May 25, 2
2021-05-25
Semiconductor Device
App 20210043752 - Lin; Yi-Chuan ;   et al.
2021-02-11
Manufacturing method of semiconductor device
Grant 10,825,914 - Lin , et al. November 3, 2
2020-11-03
Flash Memory Cell Structure With Step-shaped Floating Gate
App 20200279930 - CHU; Yu-Hsien ;   et al.
2020-09-03
Method of manufacturing semiconductor device having multi-height structure
Grant 10,672,777 - Su , et al.
2020-06-02
Flash memory cell structure with step-shaped floating gate
Grant 10,658,479 - Chu , et al.
2020-05-19
Semiconductor Device
App 20200152648 - Liu; Chien-Hsuan ;   et al.
2020-05-14
Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same
Grant 10,535,670 - Liu , et al. Ja
2020-01-14
Semiconductor Structure and Method for Forming the Same
App 20190259771 - Chuang; Chiang-Ming ;   et al.
2019-08-22
Method Of Manufacturing Semiconductor Device Having Multi-height Structure
App 20190181149 - SU; Kuan-Wei ;   et al.
2019-06-13
Semiconductor Device And Manufacturing Method Thereof
App 20190148513 - Lin; Yi-Chuan ;   et al.
2019-05-16
Flash Memory Cell Structure With Step-shaped Floating Gate
App 20190148504 - CHU; Yu-Hsien ;   et al.
2019-05-16
Semiconductor structure and method for forming the same
Grant 10,283,510 - Chuang , et al.
2019-05-07
Semiconductor device having milti-height structure and method of manufacturing the same
Grant 10,211,214 - Su , et al. Feb
2019-02-19
Memory with a raised dummy feature surrounding a cell region
Grant 10,163,641 - Lee , et al. Dec
2018-12-25
Gate structure with multiple spacers
Grant 10,103,235 - Pan , et al. October 16, 2
2018-10-16
Semiconductor Device Having Milti-height Structure And Method Of Manufacturing The Same
App 20180261609 - SU; Kuan-Wei ;   et al.
2018-09-13
Method for manufacturing redistribution layer
Grant 9,997,479 - Lu , et al. June 12, 2
2018-06-12
Method For Manufacturing Redistribution Layer
App 20180151519 - LU; Szu-Hsien ;   et al.
2018-05-31
Semiconductor device having milti-height structure and method of manufacturing the same
Grant 9,947,759 - Lin , et al. April 17, 2
2018-04-17
Semiconductor device and method for manufacturing the same
Grant 9,899,395 - Lee , et al. February 20, 2
2018-02-20
Semiconductor Structure and Method for Forming the Same
App 20180047740 - Lee; Chih-Ming ;   et al.
2018-02-15
Semiconductor Device And Method For Manufacturing The Same
App 20180033796 - Lee; Chih-Ming ;   et al.
2018-02-01
Semiconductor Structure and Method for Forming the Same
App 20180006046 - Chuang; Chiang-Ming ;   et al.
2018-01-04
Semiconductor structure and method for forming the same
Grant 9,768,182 - Chuang , et al. September 19, 2
2017-09-19
Manufacturing Method Of Non-volatile Memory And Non-volatile Memory
App 20170250188 - Liu; Chien-Hsuan ;   et al.
2017-08-31
Gate Structure With Multiple Spacers
App 20170243946 - PAN; Chia-Ming ;   et al.
2017-08-24
Semiconductor structure and fabricating method thereof
Grant 9,728,543 - Pan , et al. August 8, 2
2017-08-08
Gate structure with multiple spacer and method for manufacturing the same
Grant 9,653,302 - Pan , et al. May 16, 2
2017-05-16
Semiconductor Structure And Method For Forming The Same
App 20170110466 - CHUANG; Chiang-Ming ;   et al.
2017-04-20
Gate Structure With Multiple Spacer And Method For Manufacturing The Same
App 20170032971 - PAN; Chia-Ming ;   et al.
2017-02-02
Method of making bond pad
Grant 9,418,948 - Chuang , et al. August 16, 2
2016-08-16
Method for forming a semiconductor device with void-free shallow trench isolation
Grant 9,263,316 - Wu , et al. February 16, 2
2016-02-16
Method of making bond pad
Grant 9,252,109 - Chuang , et al. February 2, 2
2016-02-02
Method Of Making Bond Pad
App 20160020183 - CHUANG; Chiang-Ming ;   et al.
2016-01-21
Semiconductor Device With Shallow Trench Isolation
App 20150228534 - Wu; Shang-Yen ;   et al.
2015-08-13
Method Of Making Bond Pad
App 20140322908 - CHUANG; Chiang-Ming ;   et al.
2014-10-30
Bonding pad and method of making same
Grant 8,796,851 - Chuang , et al. August 5, 2
2014-08-05
Bonding Pad And Method Of Making Same
App 20130175689 - CHUANG; Chiang-Ming ;   et al.
2013-07-11
Dual SOI structure
Grant 7,986,029 - Chuang , et al. July 26, 2
2011-07-26
Methods Of Manufacturing Metal-silicide Features
App 20100314698 - Lin; Chen-Tung ;   et al.
2010-12-16
Methods Of Manufacturing Metal-silicide Features
App 20100273324 - Lin; Chen-Tung ;   et al.
2010-10-28
Methods of manufacturing metal-silicide features
Grant 7,781,316 - Lin , et al. August 24, 2
2010-08-24
Silicided regions for NMOS and PMOS devices
Grant 7,687,861 - Wu , et al. March 30, 2
2010-03-30
Method for integrally forming an electrical fuse device and a MOS transistor
Grant 7,534,671 - Chuang , et al. May 19, 2
2009-05-19
Method for Integrally Forming an Electrical Fuse Device and a MOS Transistor
App 20080182373 - Chuang; Chiang-Ming ;   et al.
2008-07-31
Method for integrally forming an electrical fuse device and a MOS transistor
Grant 7,361,968 - Chuang , et al. April 22, 2
2008-04-22
Methods of Manufacturing Metal-Silicide Features
App 20070284678 - Lin; Chen-Tung ;   et al.
2007-12-13
Method for integrally forming an electrical fuse device and a MOS transistor
App 20070221966 - Chuang; Chiang-Ming ;   et al.
2007-09-27
Methods of manufacturing metal-silicide features
Grant 7,268,065 - Lin , et al. September 11, 2
2007-09-11
Dual SOI structure
App 20070102769 - Chuang; Chiang-Ming ;   et al.
2007-05-10
Silicided regions for NMOS and PMOS devices
App 20070090462 - Wu; Chii-Ming ;   et al.
2007-04-26
Methods of manufacturing metal-silicide features
App 20050280118 - Lin, Chen-Tung ;   et al.
2005-12-22

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