loadpatents
name:-0.036293983459473
name:-0.019706964492798
name:-0.012050867080688
CHU; LUNG-KUN Patent Filings

CHU; LUNG-KUN

Patent Applications and Registrations

Patent applications and USPTO patent grants for CHU; LUNG-KUN.The latest application filed is for "semiconductor device structure including forksheet transistors and methods of forming the same".

Company Profile
13.15.33
  • CHU; LUNG-KUN - New Taipei City TW
  • Chu; Lung-Kun - New Taipei TW
  • Chu; Lung-Kun - Hsin-Chu TW
  • CHU; Lung-Kun - Hsinchu TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor Device Structure Including Forksheet Transistors And Methods Of Forming The Same
App 20220302275 - YU; Jia-Ni ;   et al.
2022-09-22
Semiconductor device having nanosheet transistor and methods of fabrication thereof
Grant 11,450,664 - Huang , et al. September 20, 2
2022-09-20
Semiconductor Device Structure And Method For Forming The Same
App 20220271148 - HUANG; Mao-Lin ;   et al.
2022-08-25
Semiconductor structure and method for forming the same
Grant 11,417,653 - Yu , et al. August 16, 2
2022-08-16
Gate patterning process for multi-gate devices
Grant 11,387,346 - Huang , et al. July 12, 2
2022-07-12
Nanosheet device with dipole dielectric layer and methods of forming the same
Grant 11,374,105 - Hsu , et al. June 28, 2
2022-06-28
Gate Structure And Patterning Method
App 20220181218 - Chu; Lung-Kun ;   et al.
2022-06-09
Work Function Design To Increase Density Of Nanosheet Devices
App 20220173096 - Huang; Mao-Lin ;   et al.
2022-06-02
Semiconductor Device Having Nanosheet Transistor And Methods Of Fabrication Thereof
App 20220165731 - HUANG; Mao-Lin ;   et al.
2022-05-26
Semiconductor Structures and Methods Thereof
App 20220140097 - Hsu; Chung-Wei ;   et al.
2022-05-05
Metal Gate Patterning Process and Devices Thereof
App 20220140115 - Chu; Lung-Kun ;   et al.
2022-05-05
Field Effect Transistor And Method
App 20220115498 - CHU; Lung-Kun ;   et al.
2022-04-14
Input/Output Semiconductor Devices
App 20220108984 - Huang; Mao-Lin ;   et al.
2022-04-07
Semiconductor Device Fabrication Methods And Structures Thereof
App 20220093472 - Hsu; Chung-Wei ;   et al.
2022-03-24
Semiconductor Structures And Methods Thereof
App 20220084830 - Hsu; Chung-Wei ;   et al.
2022-03-17
Gate structure and patterning method
Grant 11,264,288 - Chu , et al. March 1, 2
2022-03-01
Work function design to increase density of nanosheet devices
Grant 11,257,815 - Huang , et al. February 22, 2
2022-02-22
Methods of fabricating semiconductor devices for tightening spacing between nanosheets in GAA structures and structures formed thereby
Grant 11,244,871 - Chiang , et al. February 8, 2
2022-02-08
Transistors With Different Threshold Voltages
App 20220037499 - Chu; Lung-Kun ;   et al.
2022-02-03
Input/output semiconductor devices
Grant 11,205,650 - Huang , et al. December 21, 2
2021-12-21
Forming metal gates with multiple threshold voltages
Grant 11,201,094 - Chu , et al. December 14, 2
2021-12-14
Self-Aligned Backside Source Contact Structure
App 20210376093 - Chu; Lung-Kun ;   et al.
2021-12-02
Dipole Patterning for CMOS Devices
App 20210366783 - Chu; Lung-Kun ;   et al.
2021-11-25
Silicon Channel Tempering
App 20210359142 - Huang; Mao-Lin ;   et al.
2021-11-18
Gate-all-around Devices Having Self-aligned Capping Between Channel And Backside Power Rail
App 20210359091 - Hsu; Chung-Wei ;   et al.
2021-11-18
Gate Patterning Process for Multi-Gate Devices
App 20210336033 - Huang; Mao-Lin ;   et al.
2021-10-28
Transistors with different threshold voltages
Grant 11,152,477 - Chu , et al. October 19, 2
2021-10-19
Semiconductor device with dummy fin and liner and method of forming the same
Grant 11,145,734 - Yu , et al. October 12, 2
2021-10-12
Nanosheet Device with Dipole Dielectric Layer and Methods of Forming the Same
App 20210305400 - Hsu; Chung-Wei ;   et al.
2021-09-30
P-Metal Gate First Gate Replacement Process for Multigate Devices
App 20210305408 - Yu; Jia-Ni ;   et al.
2021-09-30
Semiconductor Arrangement And Method Of Manufacture
App 20210287945 - CHING; Kuo-Cheng ;   et al.
2021-09-16
Transistors with Different Threshold Voltages
App 20210265496 - Chu; Lung-Kun ;   et al.
2021-08-26
Semiconductor arrangement and method of manufacture
Grant 11,024,545 - Ching , et al. June 1, 2
2021-06-01
Tuning Threshold Voltage In Nanosheet Transitor Devices
App 20210134950 - Hsu; Chung-Wei ;   et al.
2021-05-06
Work Function Design To Increase Density Of Nanosheet Devices
App 20210134794 - Huang; Mao-Lin ;   et al.
2021-05-06
Input/Output Semiconductor Devices
App 20210098456 - Huang; Mao-Lin ;   et al.
2021-04-01
Semiconductor Structure And Method For Forming The Same
App 20210098455 - YU; JIA-NI ;   et al.
2021-04-01
Gate-All-Around Device with Trimmed Channel and Dipoled Dielectric Layer and Methods of Forming the Same
App 20210066137 - Hsu; Chung-Wei ;   et al.
2021-03-04
Methods Of Fabricating Semiconductor Devices With Mixed Threshold Voltages Boundary Isolation Of Multiple Gates And Structures Formed Thereby
App 20210066136 - CHIANG; Kuo-Cheng ;   et al.
2021-03-04
Mixed workfunction metal for nanosheet device
Grant 10,937,704 - Chiang , et al. March 2, 2
2021-03-02
Methods Of Fabricating Semiconductor Devices For Tightening Spacing Between Nanosheets In Gaa Structures And Structures Formed Thereby
App 20200411387 - CHIANG; Kuo-Cheng ;   et al.
2020-12-31
Methods of fabricating semiconductor devices with mixed threshold voltages boundary isolation of multiple gates and structures formed thereby
Grant 10,867,867 - Chiang , et al. December 15, 2
2020-12-15
Methods Of Fabricating Semiconductor Devices With Mixed Threshold Voltages Boundary Isolation Of Multiple Gates And Structures Formed Thereby
App 20200294863 - CHIANG; Kuo-Cheng ;   et al.
2020-09-17
Semiconductor Arrangement And Method Of Manufacture
App 20200135576 - CHING; Kuo-Cheng ;   et al.
2020-04-30
Gate Structure and Patterning Method
App 20200105623 - Chu; Lung-Kun ;   et al.
2020-04-02
Forming Metal Gates with Multiple Threshold Voltages
App 20200058558 - Chu; Lung-Kun ;   et al.
2020-02-20
Multiple patterning techniques for metal gate
Grant 9,960,085 - Chang , et al. May 1, 2
2018-05-01
Multiple Patterning Techniques For Metal Gate
App 20170207133 - Chang; Hsiang-Pi ;   et al.
2017-07-20

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