Chow; David G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chow; David G..The latest application filed is for "stacked memory device having shared bitlines and method of making the same".

Company Profile

0.4.4

Chow; David G. - Los Altos CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Stacked memory device having shared bitlines and method of making the same Grant 6,925,015 - Garney , et al. August 2, 2	2005-08-02
Stacked memory device having shared bitlines and method of making the same App 20040100828 - Garney, John I. ; et al.	2004-05-27
Ferroelectric memory and method for reading the same Grant 6,611,448 - Nair , et al. August 26, 2	2003-08-26
Ferroelectric memory and method for reading the same Grant 6,529,398 - Nair , et al. March 4, 2	2003-03-04
Ferroelectric memory and method for reading the same App 20030026122 - Nair, Rajendran ; et al.	2003-02-06
Method and apparatus to enhance testability and validation of memory App 20020174289 - Chow, David G.	2002-11-21
Method and apparatus for increasing signal to sneak ratio in polarizable cross-point matrix memory arrays Grant 6,466,473 - Nair , et al. October 15, 2	2002-10-15
Method And Apparatus For Increasing Signal To Sneak Ratio In Polarizable Cross-point Matrix Memory Arrays App 20020141222 - Nair, Rajendran ; et al.	2002-10-03

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