loadpatents
name:-0.0039150714874268
name:-0.0026609897613525
name:-0.0011131763458252
Chou; Chi-Wei Patent Filings

Chou; Chi-Wei

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chou; Chi-Wei.The latest application filed is for "manufacturing method of array substrate".

Company Profile
0.7.8
  • Chou; Chi-Wei - Chino Hills CA
  • Chou; Chi-Wei - Hsin-Chu TW
  • Chou, Chi-Wei - Hsinchu TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Assembly and method for display device mounting
Grant 9,360,895 - Shah , et al. June 7, 2
2016-06-07
Array substrate
Grant 9,263,481 - Chung , et al. February 16, 2
2016-02-16
Manufacturing method of array substrate
Grant 9,147,700 - Chung , et al. September 29, 2
2015-09-29
Array Substrate
App 20150123128 - Chung; Yi-Chen ;   et al.
2015-05-07
Manufacturing Method Of Array Substrate
App 20150126006 - Chung; Yi-Chen ;   et al.
2015-05-07
Array substrate and manufacturing method thereof
Grant 8,969,146 - Chung , et al. March 3, 2
2015-03-03
Assembly And Method For Display Device Mounting
App 20140198473 - Shah; Shrenik ;   et al.
2014-07-17
Manufacturing method of array substrate
Grant 8,759,165 - Ku , et al. June 24, 2
2014-06-24
Manufacturing Method Of Array Substrate
App 20140127844 - Ku; Hui-Ling ;   et al.
2014-05-08
Array substrate and manufacturing method thereof
Grant 8,674,365 - Ku , et al. March 18, 2
2014-03-18
Array Substrate And Manufacturing Method Thereof
App 20130161625 - Ku; Hui-Ling ;   et al.
2013-06-27
Array Substrate And Manufacturing Method Thereof
App 20130134425 - Chung; Yi-Chen ;   et al.
2013-05-30
Method of forming self-aligned silicide layers on semiconductor devices
App 20020182860 - Yuan, Cheng-Kuo ;   et al.
2002-12-05

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