Chou; Anthony I.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chou; Anthony I..The latest application filed is for "asymmetric high-k dielectric for reducing gate induced drain leakage".

Company Profile

12.65.71

Chou; Anthony I. - Becon NY
Chou; Anthony I. - Beacon NY
- Beacon NY US
Chou; Anthony I. - Hopewell Junction NY US
Chou; Anthony I. - Hopewell Jct. NY
Chou; Anthony I. - Fishkill NY
Chou; Anthony I. - Yorktown Heights NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 11,101,357 - Chou , et al. August 24, 2	2021-08-24
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20200365702 - Chou; Anthony I. ; et al.	2020-11-19
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 10,734,492 - Chou , et al.	2020-08-04
Semiconductor structure with integrated passive structures Grant 10,580,686 - Chou , et al.	2020-03-03
Semiconductor Structure With Integrated Passive Structures App 20200027779 - Chou; Anthony I. ; et al.	2020-01-23
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20190296120 - CHOU; Anthony I. ; et al.	2019-09-26
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 10,381,452 - Chou , et al. A	2019-08-13
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 10,374,048 - Chou , et al.	2019-08-06
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 10,367,072 - Chou , et al. July 30, 2	2019-07-30
Semiconductor Structure With Integrated Passive Structures App 20190181037A1 -	2019-06-13
Methods of making FinFET device comprising a piezoelectric liner for generating a surface charge Grant 10,256,152 - Gao , et al.	2019-04-09
Semiconductor structure with integrated passive structures Grant 10,242,906 - Chou , et al.	2019-03-26
Finfet Device Comprising A Piezoelectric Liner For Generating A Surface Charge And Methods Of Making Such A Device App 20190027601 - Gao; Qun ; et al.	2019-01-24
Semiconductor Structure With Integrated Passive Structures App 20180277424 - Chou; Anthony I. ; et al.	2018-09-27
Asymmetric semiconductor device and method of forming same Grant 10,049,942 - Chou , et al. August 14, 2	2018-08-14
Semiconductor structure with integrated passive structures Grant 10,032,862 - Chou , et al. July 24, 2	2018-07-24
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 9,922,831 - Chou , et al. March 20, 2	2018-03-20
Junction butting structure using nonuniform trench shape Grant 9,923,082 - Chou , et al. March 20, 2	2018-03-20
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20180076039 - CHOU; Anthony I. ; et al.	2018-03-15
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20180061646 - CHOU; Anthony I. ; et al.	2018-03-01
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20180061645 - CHOU; Anthony I. ; et al.	2018-03-01
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 9,859,122 - Chou , et al. January 2, 2	2018-01-02
Asymmetric high-K dielectric for reducing gate induced drain leakage Grant 9,837,319 - Chou , et al. December 5, 2	2017-12-05
Semiconductor Structure With Integrated Passive Structures App 20170338145 - Chou; Anthony I. ; et al.	2017-11-23
Semiconductor structure with integrated passive structures Grant 9,768,195 - Chou , et al. September 19, 2	2017-09-19
Asymmetric high-K dielectric for reducing gate induced drain leakage Grant 9,768,071 - Chou , et al. September 19, 2	2017-09-19
Semiconductor Structure With Integrated Passive Structures App 20170236898 - Chou; Anthony I. ; et al.	2017-08-17
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 9,721,843 - Chou , et al. August 1, 2	2017-08-01
Methods And Control Systems Of Resistance Adjustment Of Resistors App 20170199532 - Chou; Anthony I. ; et al.	2017-07-13
Methods and control systems of resistance adjustment of resistors Grant 9,703,301 - Chou , et al. July 11, 2	2017-07-11
Semiconductor structure with integrated passive structures Grant 9,698,159 - Chou , et al. July 4, 2	2017-07-04
Junction Butting Structure Using Nonuniform Trench Shape App 20170179257 - Chou; Anthony I. ; et al.	2017-06-22
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20170178913 - CHOU; Anthony I. ; et al.	2017-06-22
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 9,685,379 - Chou , et al. June 20, 2	2017-06-20
Semiconductor structure with integrated passive structures Grant 9,659,961 - Chou , et al. May 23, 2	2017-05-23
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20170125542 - CHOU; Anthony I. ; et al.	2017-05-04
Junction butting structure using nonuniform trench shape Grant 9,627,480 - Chou , et al. April 18, 2	2017-04-18
Asymmetric Semiconductor Device And Method Of Forming Same App 20170076991 - Chou; Anthony I. ; et al.	2017-03-16
Asymmetric high-K dielectric for reducing gate induced drain leakage Grant 9,577,061 - Chou , et al. February 21, 2	2017-02-21
Asymmetric high-K dielectric for reducing gate induced drain leakage Grant 9,570,354 - Chou , et al. February 14, 2	2017-02-14
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 9,559,010 - Chou , et al. January 31, 2	2017-01-31
Asymmetric high-k dielectric for reducing gate induced drain leakage Grant 9,543,213 - Chou , et al. January 10, 2	2017-01-10
High Performance Heat Shields With Reduced Capacitance App 20160379999 - Chou; Anthony I. ; et al.	2016-12-29
High performance heat shields with reduced capacitance Grant 9,530,798 - Chou , et al. December 27, 2	2016-12-27
Replacement gate structure for enhancing conductivity Grant 9,508,826 - Chou , et al. November 29, 2	2016-11-29
Buried signal transmission line Grant 9,484,246 - Chou , et al. November 1, 2	2016-11-01
Semiconductor Structure With Integrated Passive Structures App 20160307806 - Chou; Anthony I. ; et al.	2016-10-20
Semiconductor Structure With Integrated Passive Structures App 20160307918 - Chou; Anthony I. ; et al.	2016-10-20
Replacement gate structure for enhancing conductivity Grant 9,450,072 - Chou , et al. September 20, 2	2016-09-20
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160268390 - CHOU; Anthony I. ; et al.	2016-09-15
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160260638 - CHOU; Anthony I. ; et al.	2016-09-08
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160260618 - CHOU; Anthony I. ; et al.	2016-09-08
Semiconductor structure with integrated passive structures Grant 9,425,079 - Chou , et al. August 23, 2	2016-08-23
CMOS gate contact resistance reduction Grant 9,412,759 - Chou , et al. August 9, 2	2016-08-09
Methods and control systems of resistance adjustment of resistors Grant 9,400,511 - Chou , et al. July 26, 2	2016-07-26
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160203987 - CHOU; Anthony I. ; et al.	2016-07-14
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160203985 - CHOU; Anthony I. ; et al.	2016-07-14
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160204214 - CHOU; Anthony I. ; et al.	2016-07-14
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160204209 - CHOU; Anthony I. ; et al.	2016-07-14
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160203986 - CHOU; Anthony I. ; et al.	2016-07-14
Cmos Gate Contact Resistance Reduction App 20160172378 - Chou; Anthony I. ; et al.	2016-06-16
Asymmetric High-k Dielectric For Reducing Gate Induced Drain Leakage App 20160149013 - CHOU; Anthony I. ; et al.	2016-05-26
Semiconductor Structure With Integrated Passive Structures App 20160013181 - Chou; Anthony I. ; et al.	2016-01-14
Semiconductor Structure With Integrated Passive Structures App 20160013093 - Chou; Anthony I. ; et al.	2016-01-14
Junction Butting Structure Using Nonuniform Trench Shape App 20150380488 - Chou; Anthony I. ; et al.	2015-12-31
Replacement Gate Structure For Enhancing Conductivity App 20150372109 - Chou; Anthony I. ; et al.	2015-12-24
Buried Signal Transmission Line App 20150371893 - Chou; Anthony I. ; et al.	2015-12-24
Replacement Gate Structure For Enhancing Conductivity App 20150372112 - Chou; Anthony I. ; et al.	2015-12-24
Semiconductor structure with integrated passive structures Grant 9,219,059 - Chou , et al. December 22, 2	2015-12-22
Junction Butting In Soi Transistor With Embedded Source/drain App 20150270284 - Chou; Anthony I. ; et al.	2015-09-24
Method of forming a gated diode structure for eliminating RIE damage from cap removal Grant 9,064,972 - Chou , et al. June 23, 2	2015-06-23
Memory Device Employing An Inverted U-shaped Floating Gate App 20150162438 - Chou; Anthony I. ; et al.	2015-06-11
Non-volatile Memory Device Integrated With Cmos Soi Fet On A Single Chip App 20150123190 - Chou; Anthony I. ; et al.	2015-05-07
Non-volatile memory device integrated with CMOS SOI FET on a single chip Grant 8,963,228 - Chou , et al. February 24, 2	2015-02-24
Selective deposition of germanium spacers on nitride Grant 8,900,961 - Chakravarti , et al. December 2, 2	2014-12-02
Non-volatile Memory Device Integrated With Cmos Soi Fet On A Single Chip App 20140312404 - Chou; Anthony I. ; et al.	2014-10-23
Method of Forming A Gated Diode Structure for Eliminating RIE Damage From Cap Removal App 20140206160 - Chou; Anthony I. ; et al.	2014-07-24
Gated diode structure for eliminating RIE damage from cap removal Grant 8,779,551 - Chou , et al. July 15, 2	2014-07-15
Ion Implantation Tuning To Achieve Simultaneous Multiple Implant Energies App 20140106550 - Chou; Anthony I. ; et al.	2014-04-17
Semiconductor Structure With Integrated Passive Structures App 20140084412 - Chou; Anthony I. ; et al.	2014-03-27
Integrated circuit having local maximum operating voltage Grant 8,667,448 - Chou , et al. March 4, 2	2014-03-04
Gated Diode Structure For Eliminating Rie Damage From Cap Removal App 20130328124 - Chou; Anthony I. ; et al.	2013-12-12
Bulk substrate FET integrated on CMOS SOI Grant 8,558,313 - Chou , et al. October 15, 2	2013-10-15
Planar Polysilicon Regions For Precision Resistors And Electrical Fuses And Method Of Fabrication App 20130264679 - Kumar; Arvind ; et al.	2013-10-10
Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) Grant 8,546,920 - Chou , et al. October 1, 2	2013-10-01
Semiconductor-on-insulator (soi) Structures Including Gradient Nitrided Buried Oxide (box) App 20130037885 - Chou; Anthony I. ; et al.	2013-02-14
Read transistor for single poly non-volatile memory using body contacted SOI device Grant 8,299,519 - Chou , et al. October 30, 2	2012-10-30
Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) Grant 8,288,826 - Chou , et al. October 16, 2	2012-10-16
Gated diode structure and method including relaxed liner Grant 8,232,603 - Chou , et al. July 31, 2	2012-07-31
Bulk substrate FET integrated on CMOS SOI Grant 8,232,599 - Chou , et al. July 31, 2	2012-07-31
Bulk Substrate Fet Integrated On Cmos Soi App 20120187492 - Chou; Anthony I. ; et al.	2012-07-26
Process for epitaxially growing epitaxial material regions Grant 8,173,524 - Chakravarti , et al. May 8, 2	2012-05-08
Semiconductor-on-insulator (soi) Structures Including Gradient Nitrided Buried Oxide (box) App 20120049317 - Chou; Anthony I. ; et al.	2012-03-01
Semiconductor-on-insulator(SOI) structures including gradient nitrided buried oxide (BOX) Grant 8,053,373 - Chou , et al. November 8, 2	2011-11-08
Read Transistor For Single Poly Non-volatile Memory Using Body Contacted Soi Device App 20110169064 - Chou; Anthony I. ; et al.	2011-07-14
Bulk Substrate Fet Integrated On Cmos Soi App 20110163383 - Chou; Anthony I. ; et al.	2011-07-07
SOI transistor having a carrier recombination structure in a body Grant 7,956,415 - Chou , et al. June 7, 2	2011-06-07
Method and structure for SOI body contact FET with reduced parasitic capacitance Grant 7,893,494 - Chang , et al. February 22, 2	2011-02-22
Selective deposition of germanium spacers on nitride Grant 7,888,241 - Chakravarti , et al. February 15, 2	2011-02-15
Selective Deposition Of Germanium Spacers On Nitride App 20110034000 - Chakravarti; Ashima B. ; et al.	2011-02-10
Selectable device options for characterizing semiconductor devices Grant 7,814,454 - Chou , et al. October 12, 2	2010-10-12
Field effect transistor with reduced shallow trench isolation induced leakage current Grant 7,804,140 - Chang , et al. September 28, 2	2010-09-28
Gated Diode Structure and Method Including Relaxed Liner App 20100237421 - Chou; Anthony I. ; et al.	2010-09-23
Method And Structure For Soi Body Contact Fet With Reduced Parasitic Capacitance App 20090315138 - Chang; Leland ; et al.	2009-12-24
Soi Transistor Having A Carrier Recombination Structure In A Body App 20090302386 - Chou; Anthony I. ; et al.	2009-12-10
Polygrain Engineering By Adding Impurities In The Gas Phase During Chemical Vapor Deposition Of Polysilicon App 20090269926 - Dube; Abhishek ; et al.	2009-10-29
Field Effect Transistor With Reduced Shallow Trench Isolation Induced Leakage Current App 20090224335 - Chang; Leland ; et al.	2009-09-10
Integrated multiple gate dielectric composition and thickness semiconductor chip and method of manufacturing the same Grant 7,518,145 - Chou , et al. April 14, 2	2009-04-14
Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process Grant 7,491,964 - Buehrer , et al. February 17, 2	2009-02-17
Nitridation of STI fill oxide to prevent the loss of STI fill oxide during manufacturing process Grant 7,491,563 - Buehrer , et al. February 17, 2	2009-02-17
Selectable Device Options For Characterizing Semiconductor Devices App 20090007051 - Chou; Anthony I. ; et al.	2009-01-01
Selective Deposition of Germanium Spacers on Nitride App 20080242041 - Chakravarti; Ashima B. ; et al.	2008-10-02
Semiconductor-on-insulator(soi) Structures Including Gradient Nitrided Buried Oxide (box) App 20080224256 - Chou; Anthony I. ; et al.	2008-09-18
Method For Reducing Top Notching Effects In Pre-doped Gate Structures App 20080188089 - Chou; Anthony I. ; et al.	2008-08-07
Integrated Multiple Gate Dielectric Composition And Thickness Semiconductor Chip And Method Of Manufacturing The Same App 20080179714 - Chou; Anthony I. ; et al.	2008-07-31
Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) Grant 7,396,776 - Chou , et al. July 8, 2	2008-07-08
Nitridation of STI Fill Oxide to Prevent the Loss of STI Fill Oxide During Manufacturing Process App 20080090379 - Buehrer; Fred ; et al.	2008-04-17
Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) App 20080014740 - Chou; Anthony I. ; et al.	2008-01-17
Selective post-doping of gate structures by means of selective oxide growth Grant 7,288,814 - Chou , et al. October 30, 2	2007-10-30
Selective Deposition Of Germanium Spacers On Nitride App 20070059894 - Chakravarti; Ashima B. ; et al.	2007-03-15
Nitridation Of Sti Fill Oxide To Prevent The Loss Of Sti Fill Oxide During Manufacturing Process App 20060160322 - Buehrer; Fred ; et al.	2006-07-20
Dielectrics with improved leakage characteristics Grant 7,022,626 - Chou , et al. April 4, 2	2006-04-04
Selective post-doping of gate structures by means of selective oxide growth App 20060057811 - Chou; Anthony I. ; et al.	2006-03-16
Selective post-doping of gate structures by means of selective oxide growth Grant 6,995,065 - Chou , et al. February 7, 2	2006-02-07
Method for forming a uniform distribution of nitrogen in silicon oxynitride gate dielectric Grant 6,930,060 - Chou , et al. August 16, 2	2005-08-16
Selective post-doping of gate structures by means of selective oxide growth App 20050148144 - Chou, Anthony I. ; et al.	2005-07-07
Dielectrics with improved leakage characteristics App 20050118836 - Chou, Anthony I. ; et al.	2005-06-02
Method For Forming A Uniform Distribution Of Nitrogen In Silicon Oxynitride Gate Dielectric App 20040256664 - Chou, Anthony I. ; et al.	2004-12-23
Method for fabricating a nitrided silicon-oxide gate dielectric Grant 6,780,720 - Burnham , et al. August 24, 2	2004-08-24
Method for fabricating a nitrided silicon-oxide gate dielectric App 20040002226 - Burnham, Jay S. ; et al.	2004-01-01
Structures and methods to minimize plasma charging damage in silicon on insulator devices App 20020142526 - Khare, Mukesh ; et al.	2002-10-03
Patterned plasma nitridation for selective epi and silicide formation Grant 6,426,305 - Chou , et al. July 30, 2	2002-07-30

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