Chok; Kho Liep
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chok; Kho Liep.The latest application filed is for "integrated circuit with protective moat".
- Chok; Kho Liep - Cupertino CA
- Chok; Kho Liep - Singapore SG
| Patent | Date |
|---|---|
| Grain boundary blocking for stress migration and electromigration improvement in CU interconnects Grant 7,989,338 - Zhang , et al. August 2, 2 | 2011-08-02 |
| Method of fabrication of a die oxide ring Grant 7,276,440 - Zhang , et al. October 2, 2 | 2007-10-02 |
| Integrated circuit with protective moat Grant 7,224,060 - Zhang , et al. May 29, 2 | 2007-05-29 |
| Integrated circuit with protective moat App 20050167824 - Zhang, Fan ; et al. | 2005-08-04 |
| Method of fabrication of a die oxide ring App 20050127495 - Zhang, Fan ; et al. | 2005-06-16 |
| Plasma enhanced chemical vapor deposited (PECVD) silicon nitride barrier layer for high density plasma chemical vapor deposited (HDP-CVD) dielectric layer Grant 6,127,238 - Liao , et al. October 3, 2 | 2000-10-03 |
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