Choi; Steve

Patent Applications and Registrations

Patent applications and USPTO patent grants for Choi; Steve.The latest application filed is for "sleeve for delivery of embolic coil".

Company Profile

2.18.19

Choi; Steve - Lafayette CO
Choi; Steve - Danville CA
Choi; Steve - San Jose CA US
Choi; Steve - Irvine CA
Choi, Steve - Lexington MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Sleeve For Delivery Of Embolic Coil App 20220142649 - Choi; Steve ; et al.	2022-05-12
Sleeve for delivery of embolic coil Grant 11,253,266 - Choi , et al. February 22, 2	2022-02-22
Voltage Generation System And Method For Negative And Positive Voltage Driven Systems App 20210181777 - Zhang; Xiaofeng ; et al.	2021-06-17
Accurate self-calibrated negative to positive voltage conversion circuit and method Grant 10,910,072 - Zhang , et al. February 2, 2	2021-02-02
Sleeve For Delivery Of Embolic Coil App 20200268392 - Choi; Steve ; et al.	2020-08-27
Word Line Leakage Detection With Common Mode Tracking App 20190006020 - Sundaresan; Supraja ; et al.	2019-01-03
Temperature code circuit with single ramp for calibration and determination Grant 9,715,913 - Yin , et al. July 25, 2	2017-07-25
Digital ramp rate control for charge pumps Grant 9,653,126 - Nguyen , et al. May 16, 2	2017-05-16
Multi-clock generation through phase locked loop (PLL) reference Grant 9,514,831 - Huynh , et al. December 6, 2	2016-12-06
Self-adjusting regulation current for memory array source line Grant 9,368,224 - Wang , et al. June 14, 2	2016-06-14
Dynamic load matching charge pump for reduced current consumption Grant 9,154,027 - Huynh , et al. October 6, 2	2015-10-06
Self-Adjusting Regulation Current for Memory Array Source Line App 20150228351 - Wang; Sung-En ; et al.	2015-08-13
Multi-Clock Generation Through Phase Locked Loop (PLL) Reference App 20150214964 - Huynh; Jonathan ; et al.	2015-07-30
Digital Ramp Rate Control For Charge Pumps App 20150213844 - Nguyen; Qui Vi ; et al.	2015-07-30
Dynamic Load Matching Charge Pump for Reduced Current Consumption App 20150162825 - Huynh; Jonathan ; et al.	2015-06-11
Method of measuring flash memory cell current Grant 8,581,595 - Ang , et al. November 12, 2	2013-11-12
Flash memory array system including a top gate memory cell Grant 8,270,213 - Van Tran , et al. September 18, 2	2012-09-18
Flash Memory Array System Including A Top Gate Memory Cell App 20110122693 - Tran; Hieu Van ; et al.	2011-05-26
Apparatus and method for generating wide-range regulated supply voltages for a flash memory Grant 7,848,167 - Park , et al. December 7, 2	2010-12-07
Flash memory array system including a top gate memory cell Grant 7,848,140 - Tran , et al. December 7, 2	2010-12-07
Flash memory array system including a top gate memory cell Grant 7,778,080 - Tran , et al. August 17, 2	2010-08-17
Apparatus And Method For Generating Wide-range Regulated Supply Voltages For A Flash Memory App 20100097876 - Park; Soo-Yong ; et al.	2010-04-22
Method of measuring flash memory cell current App 20100039095 - Ang; Boon-Aik ; et al.	2010-02-18
Flash memory array with a top gate line dynamically coupled to a word line Grant 7,663,921 - Van Tran , et al. February 16, 2	2010-02-16
Flash Memory Array System Including A Top Gate Memory Cell App 20090323415 - Tran; Hieu Van ; et al.	2009-12-31
Flash memory array system including a top gate memory cell Grant 7,626,863 - Tran , et al. December 1, 2	2009-12-01
Flash memory array having control/decode circuitry for disabling top gates of defective memory cells Grant 7,567,458 - Tran , et al. July 28, 2	2009-07-28
Flash Memory Array System Including A Top Gate Memory Cell App 20090067239 - Tran; Hieu Van ; et al.	2009-03-12
Flash Memory Array System Including A Top Gate Memory Cell App 20090052248 - Tran; Hieu Van ; et al.	2009-02-26
Method for handling a defective top gate of a source-side injection flash memory array Grant 7,447,073 - Tran , et al. November 4, 2	2008-11-04
Flash memory array system including a top gate memory cell App 20070147131 - Tran; Hieu Van ; et al.	2007-06-28
Flash memory array system including a top gate memory cell App 20070147111 - Tran; Hieu Van ; et al.	2007-06-28
Flash memory array system including a top gate memory cell App 20070070703 - Tran; Hieu Van ; et al.	2007-03-29
Circuit and a method to screen for defects in an addressable line in a non-volatile memory Grant 6,972,994 - Nguyen , et al. December 6, 2	2005-12-06
Circuit And A Method To Screen For Defects In An Addressable Line In A Non-volatile Memory App 20050201152 - Nguyen, Hung Q. ; et al.	2005-09-15
Wallboard adhesive App 20010054482 - Stein, Edward ; et al.	2001-12-27

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