Choi; Joonyoung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Choi; Joonyoung.The latest application filed is for "integrated circuit devices and methods of manufacturing the same".

Company Profile

2.19.16

Choi; Joonyoung - Suwon-si KR
Choi; JoonYoung - Gyeonggi-do KR
Choi; JoonYoung - Guwangju-si KR
Choi; JoonYoung - Incheon N/A KR
Choi; JoonYoung - Kyoung-ki-do N/A KR
Choi; Joonyoung - Daejeon KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated Circuit Devices And Methods Of Manufacturing The Same App 20220115504 - Choi; Joonyoung	2022-04-14
Fabrication method of integrated circuit semiconductor device Grant 11,171,038 - Jeon , et al. November 9, 2	2021-11-09
Fabrication Method Of Integrated Circuit Semiconductor Device App 20200395241 - JEON; Namho ; et al.	2020-12-17
Semiconductor device and method of forming bump structure with insulating buffer layer to reduce stress on semiconductor wafer Grant 9,780,063 - Choi , et al. October 3, 2	2017-10-03
Semiconductor device and method of individual die bonding followed by simultaneous multiple die thermal compression bonding Grant 9,524,958 - Choi , et al. December 20, 2	2016-12-20
Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer Grant 9,252,093 - Choi , et al. February 2, 2	2016-02-02
Method of manufacture of integrated circuit packaging system with plasma processing Grant 9,093,278 - Choi , et al. July 28, 2	2015-07-28
Integrated circuit packaging system with interconnects Grant 9,059,108 - Choi , et al. June 16, 2	2015-06-16
Semiconductor device and method of forming recesses in substrate for same size or different sized die with vertical integration Grant 8,994,048 - Choi , et al. March 31, 2	2015-03-31
Semiconductor Device and Method of Individual Die Bonding Followed by Simultaneous Multiple Die Thermal Compression Bonding App 20150001703 - Choi; JoonYoung ; et al.	2015-01-01
Semiconductor Device and Method of Forming Bump Structure with Insulating Buffer Layer to Reduce Stress on Semiconductor Wafer App 20140319680 - Choi; JoonYoung ; et al.	2014-10-30
Semiconductor device and method of forming bump structure with insulating buffer layer to reduce stress on semiconductor wafer Grant 8,835,301 - Choi , et al. September 16, 2	2014-09-16
Semiconductor Device and Method of Forming Multi-Layered UBM with Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor Wafer App 20140070410 - Choi; DaeSik ; et al.	2014-03-13
Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer Grant 8,642,469 - Choi , et al. February 4, 2	2014-02-04
Integrated circuit packaging system with interconnects and method of manufacture thereof Grant 8,546,194 - Choi , et al. October 1, 2	2013-10-01
Integrated Circuit Packaging System With Interconnects And Method Of Manufacture Thereof App 20130221543 - Choi; DaeSik ; et al.	2013-08-29
Integrated Circuit Packaging System With Interconnects And Method Of Manufacture Thereof App 20130157418 - Choi; JoonYoung ; et al.	2013-06-20
Semiconductor Device and Method of Forming a Wafer Level Package Structure Using Conductive Via and Exposed Bump App 20130001773 - Cho; SungWon ; et al.	2013-01-03
Semiconductor wafer, semiconductor device using the same, and method and apparatus for producing the same Grant 8,343,853 - Koo , et al. January 1, 2	2013-01-01
Semiconductor device and method of forming a wafer level package structure using conductive via and exposed bump Grant 8,288,203 - Cho , et al. October 16, 2	2012-10-16
Semiconductor Device and Method of Forming a Wafer Level Package Structure Using Conductive Via and Exposed Bump App 20120217629 - Cho; SungWon ; et al.	2012-08-30
Semiconductor Device and Method of Forming Bump Structure with Insulating Buffer Layer to Reduce Stress on Semiconductor Wafer App 20120217640 - Choi; JoonYoung ; et al.	2012-08-30
Semiconductor Device and Method of Forming Multi-Layered UBM with Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor Wafer App 20120211900 - Choi; DaeSik ; et al.	2012-08-23
Semiconductor Device and Method of Forming Recesses in Substrate for Same Size or Different Sized Die with Vertical Integration App 20120146177 - Choi; JoonYoung ; et al.	2012-06-14
Semiconductor wafer, semiconductor device using the same, and method and apparatus for producing the same App 20100148310 - Koo; Tae-Hyoung ; et al.	2010-06-17
Apparatus and method for inserting null packet in digital broadcasting transmission system Grant 7,321,602 - Bae , et al. January 22, 2	2008-01-22
Apparatus and method for inserting null packet in digital broadcasting transmission system App 20040008736 - Bae, Byungjun ; et al.	2004-01-15

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