loadpatents
name:-0.00037193298339844
name:-0.0027079582214355
name:-0.00064396858215332
Choe; Hyoun S. Patent Filings

Choe; Hyoun S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Choe; Hyoun S..The latest application filed is for "method of depositing diffusion barrier for copper interconnect in integrated circuit".

Company Profile
0.2.0
  • Choe; Hyoun S. - La Palma CA
  • Choe; Hyoun S. - Waltham MA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of depositing diffusion barrier for copper interconnect in integrated circuit
Grant 6,534,404 - Danek , et al. March 18, 2
2003-03-18
Solid polymer electrolytes
Grant 5,474,860 - Abraham , et al. December 12, 1
1995-12-12

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