Cho; Yonah

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cho; Yonah.The latest application filed is for "nmos transistor devices and methods for fabricating same".

Company Profile

1.9.11

Cho; Yonah - Sunnyvale CA US
Cho; Yonah - Santa Clara CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods of forming oxide layers on substrates Grant 8,492,292 - Yokota , et al. July 23, 2	2013-07-23
NMOS transistor devices and methods for fabricating same Grant 8,330,225 - Thirupapuliyur , et al. December 11, 2	2012-12-11
Enhancing NAND flash floating gate performance Grant 8,163,626 - Swenburg , et al. April 24, 2	2012-04-24
Nmos Transistor Devices And Methods For Fabricating Same App 20110278651 - Thirupapuliyur; Sunderraj ; et al.	2011-11-17
NMOS transistor devices and methods for fabricating same Grant 7,994,015 - Thirupapuliyur , et al. August 9, 2	2011-08-09
Method of selective nitridation Grant 7,972,933 - Olsen , et al. July 5, 2	2011-07-05
Methods Of Forming Oxide Layers On Substrates App 20100330814 - Yokota; Yoshitaka ; et al.	2010-12-30
Enhancing Nand Flash Floating Gate Performance App 20100317186 - Swenberg; Johanes ; et al.	2010-12-16
Nmos Transistor Devices And Methods For Fabricating Same App 20100264470 - THIRUPAPULIYUR; SUNDERRAJ ; et al.	2010-10-21
Method Of Selective Nitridation App 20100248435 - OLSEN; CHRISTOPHER S. ; et al.	2010-09-30
Ridge technique for fabricating an optical detector and an optical waveguide Grant 7,760,980 - West , et al. July 20, 2	2010-07-20
Formation and treatment of epitaxial layer containing silicon and carbon Grant 7,741,200 - Cho , et al. June 22, 2	2010-06-22
Method of ultra-shallow junction formation using Si film alloyed with carbon Grant 7,732,269 - Kim , et al. June 8, 2	2010-06-08
Formation And Treatment Of Epitaxial Layer Containing Silicon And Carbon App 20080131619 - CHO; YONAH ; et al.	2008-06-05
Formation And Treatment Of Epitaxial Layer Containing Silicon And Carbon App 20080132039 - CHO; YONAH ; et al.	2008-06-05
ALTERNATIVE INTEGRATION SCHEME FOR CMOS S/D SiGe PROCESS App 20070287244 - Shen; Meihua ; et al.	2007-12-13
CMOS S/D SiGe DEVICE MADE WITH ALTERNATIVE INTEGRATION PROCESS App 20070284668 - Shen; Meihua ; et al.	2007-12-13
Method Of Ultra-shallow Junction Formation Using Si Film Alloyed With Carbon App 20070256627 - KIM; YIHWAN ; et al.	2007-11-08
Ridge technique for fabricating an optical detector and an optical waveguide App 20070053643 - West; Lawrence C. ; et al.	2007-03-08

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.