Cho; Byung-Kwon

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cho; Byung-Kwon.The latest application filed is for "substrate processing apparatus and apparatus for manufacturing integrated circuit device".

Company Profile

7.22.22

Cho; Byung-Kwon - Suwon-si KR
Cho; Byung-kwon - Seoul KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Supercritical drying apparatus and method of drying substrate using the same Grant 11,302,526 - Park , et al. April 12, 2	2022-04-12
Substrate Processing Apparatus And Apparatus For Manufacturing Integrated Circuit Device App 20210217635 - Kim; Young-hoo ; et al.	2021-07-15
Substrate processing apparatus and apparatus for manufacturing integrated circuit device Grant 10,985,036 - Kim , et al. April 20, 2	2021-04-20
Process chamber for a supercritical process and apparatus for treating substrates having the same Grant 10,818,522 - Park , et al. October 27, 2	2020-10-27
Supercritical Drying Apparatus And Method Of Drying Substrate Using The Same App 20200227253 - PARK; Sangjine ; et al.	2020-07-16
Process Chamber For A Supercritical Process And Apparatus For Treating Substrates Having The Same App 20190096712 - PARK; Sang-Jine ; et al.	2019-03-28
Methods of forming semiconductor devices including trench walls having multiple slopes Grant 10,192,973 - Park , et al. Ja	2019-01-29
Planarized interlayer dielectric with air gap isolation Grant 10,186,485 - Nguyen , et al. Ja	2019-01-22
Substrate Processing Apparatus and Apparatus for Manufacturing Integrated Circuit Device App 20180358242 - Kim; Young-hoo ; et al.	2018-12-13
Planarized Interlayer Dielectric With Air Gap Isolation App 20180174977 - Nguyen; VietHa ; et al.	2018-06-21
Semiconductor device and method of manufacturing the same Grant 9,984,921 - Ahn , et al. May 29, 2	2018-05-29
Planarized interlayer dielectric with air gap isolation Grant 9,929,099 - Nguyen , et al. March 27, 2	2018-03-27
Semiconductor Device And Method Of Manufacturing The Same App 20180053685 - AHN; Sang Hoon ; et al.	2018-02-22
Semiconductor device and method of manufacturing the same Grant 9,812,353 - Ahn , et al. November 7, 2	2017-11-07
Planarized Interlayer Dielectric With Air Gap Isolation App 20170170184 - Nguyen; VietHa ; et al.	2017-06-15
Semiconductor Device And Method Of Manufacturing The Same App 20170162431 - AHN; Sang Hoon ; et al.	2017-06-08
Methods Of Forming Semiconductor Devices Including Trench Walls Having Multiple Slopes App 20160359017 - PARK; Sang-Jine ; et al.	2016-12-08
Pouch Container App 20160318684 - Jo; Byung-chul ; et al.	2016-11-03
Semiconductor devices including trench walls having multiple slopes Grant 9,443,979 - Park , et al. September 13, 2	2016-09-13
Standing pouch Grant 9,334,087 - Cho , et al. May 10, 2	2016-05-10
Vertical Pouch App 20150336731 - JO; Byung-chul ; et al.	2015-11-26
Semiconductor device having dual metal silicide layers and method of manufacturing the same Grant 9,117,692 - Park , et al. August 25, 2	2015-08-25
Semiconductor Devices Including Trench Walls Having Multiple Slopes App 20150187946 - PARK; Sang-Jine ; et al.	2015-07-02
Semiconductor device and method of fabricating the same Grant 9,040,415 - Park , et al. May 26, 2	2015-05-26
Semiconductor Device And Method Of Fabricating The Same App 20150050793 - PARK; Sang-Jine ; et al.	2015-02-19
Methods of fabricating a semiconductor device including metal gate electrodes Grant 8,946,026 - Choi , et al. February 3, 2	2015-02-03
Semiconductor Device Having Dual Metal Silicide Layers And Method Of Manufacturing The Same App 20150028423 - Park; Sangjine ; et al.	2015-01-29
Semiconductor device having dual metal silicide layers and method of manufacturing the same Grant 8,889,552 - Park , et al. November 18, 2	2014-11-18
Semiconductor Device Having Dual Metal Silicide Layers And Method Of Manufacturing The Same App 20140248761 - Park; Sangjine ; et al.	2014-09-04
Semiconductor devices including compressive stress patterns and methods of fabricating the same Grant 8,735,239 - Park , et al. May 27, 2	2014-05-27
Spout cap Grant D705,061 - Jo , et al. May 20, 2	2014-05-20
Spout cap Grant D705,062 - Jo , et al. May 20, 2	2014-05-20
Pouch And Method For Manufacturing Same App 20140102436 - Jo; Byung-chul ; et al.	2014-04-17
Methods Of Fabricating A Semiconductor Device Including Metal Gate Electrodes App 20120129331 - Choi; Sukhun ; et al.	2012-05-24
Semiconductor Devices Including Compressive Stress Patterns and Methods of Fabricating the Same App 20120094459 - Park; Sanjine ; et al.	2012-04-19
Semiconductor Integrated Circuit Device Including an Epitaxial Layer App 20120049250 - Park; Sang-Jine ; et al.	2012-03-01
Standing Pouch App 20110188787 - CHO; Byoung-Chol ; et al.	2011-08-04

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