| Patent | Date |
|---|
Blood Pressure Measurement Device Associated With Event
App 20160270736 - CHIU; You-Ming | 2016-09-22 |
Sensor Module For Simultaneously Measuring Ecg And Pulse Signal
App 20150250398 - LAI; Yu Chen ; et al. | 2015-09-10 |
Integrated circuit with scan-based debugging and debugging method thereof
Grant 7,533,315 - Han , et al. May 12, 2 | 2009-05-12 |
Integrated circuit with scan-based debugging and debugging method thereof
App 20070220391 - Han; I-Chieh ; et al. | 2007-09-20 |
Apparatus and method for low power clock distribution
Grant 7,180,353 - Chiu , et al. February 20, 2 | 2007-02-20 |
Apparatus And Method For Low Power Clock Distribution
App 20060170480 - Chiu; You-Ming ; et al. | 2006-08-03 |
Method for performing multi-clock static timing analysis
Grant 7,047,508 - Chiu May 16, 2 | 2006-05-16 |
Design flow method for integrated circuits
Grant 7,007,263 - Yang , et al. February 28, 2 | 2006-02-28 |
Implementing method for buffering devices
Grant 6,968,525 - Chang , et al. November 22, 2 | 2005-11-22 |
Circuitry cross-talk analysis with consideration of signal transitions
Grant 6,950,999 - Chiu , et al. September 27, 2 | 2005-09-27 |
Control chip with multiple-layer defer queue
Grant 6,898,684 - Wu , et al. May 24, 2 | 2005-05-24 |
Implementing method for buffering devices
App 20040243965 - Chang, Yung-Chung ; et al. | 2004-12-02 |
Implementing for buffering devices in circuit layout to ensure same arriving time for clock signal from source root to output bonding pads
Grant 6,826,637 - Chang , et al. November 30, 2 | 2004-11-30 |
Method for scheduling execution sequence of read and write operations
Grant 6,711,627 - Chiu March 23, 2 | 2004-03-23 |
Phase lock loop (PLL) clock generator with programmable skew and frequency
Grant 6,687,320 - Chiu , et al. February 3, 2 | 2004-02-03 |
Circuitry Cross-talk Analysis With Consideration Of Signal Transitions
App 20030217342 - Chiu, You-Ming ; et al. | 2003-11-20 |
Design flow method for integrated circuits
App 20030188282 - Yang, Chun-Chih ; et al. | 2003-10-02 |
Method for performing multi-clock static timing analysis
App 20030172361 - Chiu, You-Ming | 2003-09-11 |
Chipset with clock signal converting
Grant 6,603,828 - Chiu August 5, 2 | 2003-08-05 |
Control chip with mutliple-layer defer queue
App 20030088750 - Wu, Sheng-Chung ; et al. | 2003-05-08 |
Implementing method for buffering devices
App 20030023789 - Chang, Yung-Chung ; et al. | 2003-01-30 |
Static timing analysis method for a circuit using generated clock
App 20020070775 - Chiu, You-Ming | 2002-06-13 |
Method for scheduling execution sequence of read and write operations
App 20020019890 - Chiu, You-Ming | 2002-02-14 |
Method for controlling a process of writing data sent by a central processing unit to a memory by using a central processing unit interface
Grant 6,269,430 - Chen , et al. July 31, 2 | 2001-07-31 |
Gated clock tree synthesis method for the logic design
Grant 6,020,774 - Chiu , et al. February 1, 2 | 2000-02-01 |
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