loadpatents
name:-0.033200025558472
name:-0.011549949645996
name:-0.00070595741271973
Chiu; Tzuyin Patent Filings

Chiu; Tzuyin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chiu; Tzuyin.The latest application filed is for "silicon-germanium heterojunction bipolar transistor and manufacturing method thereof".

Company Profile
0.14.17
  • Chiu; Tzuyin - Shanghai CN
  • CHIU; Tzuyin - Pudong CN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Silicon-germanium heterojunction bipolar transistor and manufacturing method thereof
Grant 8,866,189 - Hu , et al. October 21, 2
2014-10-21
High voltage bipolar transistor with pseudo buried layers
Grant 8,674,480 - Chiu , et al. March 18, 2
2014-03-18
Silicon-germanium Heterojunction Bipolar Transistor And Manufacturing Method Thereof
App 20130140604 - Hu; Jun ;   et al.
2013-06-06
Stack inductor with different metal thickness and metal width
Grant 8,441,333 - Chiu , et al. May 14, 2
2013-05-14
Manufacturing approach for collector and a buried layer of bipolar transistor
Grant 8,420,495 - Chiu , et al. April 16, 2
2013-04-16
Parasitic vertical PNP bipolar transistor in BiCMOS process
Grant 8,421,185 - Chiu , et al. April 16, 2
2013-04-16
Parasitic vertical PNP bipolar transistor and its fabrication method in BiCMOS process
Grant 8,420,475 - Chiu , et al. April 16, 2
2013-04-16
Method For Suppressing Short Channel Effect Of Cmos Device
App 20130020652 - HUANG; Xiaolu ;   et al.
2013-01-24
Stacked inductor
Grant 8,289,118 - Chiu , et al. October 16, 2
2012-10-16
SiGe heterojunction bipolar transistor multi-finger structure
Grant 8,227,832 - Chiu , et al. July 24, 2
2012-07-24
Manufacturing approach for collector and a buried layer of bipolar transistor
Grant 8,222,114 - Chiu , et al. July 17, 2
2012-07-17
Electrode Pick Up Structure In Shallow Trench Isolation Process
App 20110156151 - CHIU; Tzuyin ;   et al.
2011-06-30
Parasitic Vertical PNP Bipolar Transistor in BICMOS Process
App 20110156202 - CHIU; Tzuyin ;   et al.
2011-06-30
Structure of electrode pick up in LOCOS
App 20110156163 - CHIU; Tzuyin ;   et al.
2011-06-30
Novel Manufacturing Approach for Collector and N Type Buried Layer Of Bipolar Transistor
App 20110159659 - CHIU; Tzuyin ;   et al.
2011-06-30
Parasitic Vertical PNP Bipolar Transistor And Its Fabrication Method In Bicmos Process
App 20110156143 - CHIU; Tzuyin ;   et al.
2011-06-30
Novel Manufacturing Approach for Collector and N Type Buried Layer Of Bipolar Transistor
App 20110159672 - CHIU; Tzuyin ;   et al.
2011-06-30
Bipolar Transistor with Pseudo Buried Layers
App 20110147892 - Chiu; Tzuyin ;   et al.
2011-06-23
SiGe HETEROJUNCTION BIPOLAR TRANSISTOR MULTI-FINGER STRUCTURE
App 20110147793 - CHIU; Tzuyin ;   et al.
2011-06-23
High Voltage Bipolar Transistor with Pseudo Buried Layers
App 20110140239 - CHIU; Tzuyin ;   et al.
2011-06-16
Stacked Inductor
App 20110133879 - CHIU; Tzuyin ;   et al.
2011-06-09
Stacked inductor with multi paths for current compensation
App 20110133877 - CHIU; Tzuyin ;   et al.
2011-06-09
Stack inductor with different metal thickness and metal width
App 20110133875 - CHIU; Tzuyin ;   et al.
2011-06-09
Stacked differential inductor
App 20110133878 - CHIU; Tzuyin ;   et al.
2011-06-09
Manufacture method for IC process with TOP and TOP-1 metal layers thickened and stacked inductor manufactured by this method
App 20110133876 - CHIU; Tzuyin ;   et al.
2011-06-09

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed