Chiu; Hsien-Yen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chiu; Hsien-Yen.The latest application filed is for "hierarchical stochastic analysis process optimization for integrated circuit design and manufacture".

Company Profile

0.5.3

Chiu; Hsien-Yen - San Jose CA
Chiu; Hsien-Yen - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Hierarchical stochastic analysis process optimization for integrated circuit design and manufacture Grant 8,005,660 - Chiu , et al. August 23, 2	2011-08-23
Method and system for performing crosstalk analysis Grant 7,549,134 - Li , et al. June 16, 2	2009-06-16
Hierarchical stochastic analysis process optimization for integrated circuit design and manufacture App 20080059143 - Chiu; Hsien-Yen ; et al.	2008-03-06
Stochastic analysis process optimization for integrated circuit design and manufacture Grant 7,243,320 - Chiu , et al. July 10, 2	2007-07-10
Stochastic analysis process optimization for integrated circuit design and manufacture App 20060150129 - Chiu; Hsien-Yen ; et al.	2006-07-06
Method and system for performing crosstalk analysis Grant 7,073,140 - Li , et al. July 4, 2	2006-07-04
High accuracy timing model for integrated circuit verification Grant 6,721,929 - Li , et al. April 13, 2	2004-04-13
High accuracy timing model for integrated circuit verification App 20020021135 - Li, Jun ; et al.	2002-02-21

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