Patent | Date |
---|
System and method for modeling I/O simultaneous switching noise Grant 8,510,697 - Breiland , et al. August 13, 2 | 2013-08-13 |
Early decoupling capacitor optimization method for hierarchical circuit design Grant 8,438,520 - Carlsen , et al. May 7, 2 | 2013-05-07 |
Early Decoupling Capacitor Optimization Method For Hierarchical Circuit Design App 20130054202 - Carlsen; Kurt A. ;   et al. | 2013-02-28 |
Multi-segments modeling bond wire interconnects with 2D simulations in high speed, high density wire bond packages Grant 8,312,404 - Hu , et al. November 13, 2 | 2012-11-13 |
System And Method For Modeling I/o Simultaneous Switching Noise App 20120204137 - BREILAND; Erik ;   et al. | 2012-08-09 |
System and method for modeling I/O simultaneous switching noise Grant 8,234,611 - Breiland , et al. July 31, 2 | 2012-07-31 |
Method of Multi-segments Modeling Bond Wire Interconnects with 2D Simulations in High Speed, High Density Wire Bond Packages App 20100332193 - Hu; Haitian ;   et al. | 2010-12-30 |
System And Method For Modeling I/o Simultaneous Switching Noise App 20100005435 - Breiland; Erik ;   et al. | 2010-01-07 |
Method For Rapid Return Path Tracing App 20090094564 - Budell; Timothy W. ;   et al. | 2009-04-09 |
Hierarchical method of power supply noise and signal integrity analysis Grant 7,197,446 - Breiland , et al. March 27, 2 | 2007-03-27 |
Integrated circuit and package modeling Grant 7,110,930 - Chiu , et al. September 19, 2 | 2006-09-19 |
Apparatus and method to reduce signal cross-talk Grant 7,038,319 - Buffet , et al. May 2, 2 | 2006-05-02 |
Hierarchical Method Of Power Supply Noise And Signal Integrity Analysis App 20060047490 - Breiland; Erik ;   et al. | 2006-03-02 |
Efficient and comprehensive method to calculate IC package or PCB trace mutual inductance using circular segments and lookup tables Grant 7,000,203 - Buffet , et al. February 14, 2 | 2006-02-14 |
Efficient And Comprehensive Method To Calculate Ic Package Or Pcb Trace Mutual Inductance Using Circular Segments And Lookup Tables App 20050102641 - Buffet, Patrick H. ;   et al. | 2005-05-12 |
Apparatus and method to reduce signal cross-talk App 20050040536 - Buffet, Patrick H. ;   et al. | 2005-02-24 |
Integrated circuit and package modeling App 20040098238 - Chiu, Charles S. ;   et al. | 2004-05-20 |
Method for enhancing a power bus in I/O regions of an ASIC device Grant 6,598,216 - Chan , et al. July 22, 2 | 2003-07-22 |
Method of designing a voltage partitioned solder-bump package Grant 6,584,596 - Buffet , et al. June 24, 2 | 2003-06-24 |
Fast method of I/O circuit placement and electrical rule checking Grant 6,584,606 - Chiu , et al. June 24, 2 | 2003-06-24 |
Method Of Designing A Voltage Partitioned Solder-bump Package App 20030061571 - Buffet, Patrick H. ;   et al. | 2003-03-27 |
Method of designing a voltage partitioned wirebond package Grant 6,523,150 - Buffet , et al. February 18, 2 | 2003-02-18 |
Method for enhancing a power bus in I/O regions of an ASIC device App 20030033578 - Chan, Francis ;   et al. | 2003-02-13 |