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name:-0.021744966506958
name:-0.024399995803833
name:-0.0016260147094727
Chitnis; Ashay Patent Filings

Chitnis; Ashay

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chitnis; Ashay.The latest application filed is for "p-doping of group-iii-nitride buffer layer structure on a heterosubstrate".

Company Profile
1.31.18
  • Chitnis; Ashay - Goleta CA US
  • Chitnis; Ashay - Maharashtra IN
  • Chitnis; Ashay - Santa Barbara CA
  • Chitnis; Ashay - Dresden DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Permanent wafer bonding using metal alloy preform discs
Grant 10,873,002 - Chitnis December 22, 2
2020-12-22
P-doping of group-III-nitride buffer layer structure on a heterosubstrate
Grant 10,211,296 - Lutgen , et al. Feb
2019-02-19
Wire bond free wafer level LED
Grant 10,199,360 - Keller , et al. Fe
2019-02-05
P-doping Of Group-iii-nitride Buffer Layer Structure On A Heterosubstrate
App 20180331187 - LUTGEN; Stephan ;   et al.
2018-11-15
P-doping of group-III-nitride buffer layer structure on a heterosubstrate
Grant 10,026,814 - Lutgen , et al. July 17, 2
2018-07-17
P-doping Of Group-iii-nitride Buffer Layer Structure On A Heterosubstrate
App 20170373156 - LUTGEN; Stephan ;   et al.
2017-12-28
P-doping of group-III-nitride buffer layer structure on a heterosubstrate
Grant 9,786,744 - Lutgen , et al. October 10, 2
2017-10-10
Wire Bond Free Wafer Level Led
App 20170179088 - Keller; Bernd ;   et al.
2017-06-22
Wire bond free wafer level LED
Grant 9,634,191 - Keller , et al. April 25, 2
2017-04-25
P-doping Of Group-iii-nitride Buffer Layer Structure On A Heterosubstrate
App 20170077242 - LUTGEN; Stephan ;   et al.
2017-03-16
P-doping of group-III-nitride buffer layer structure on a heterosubstrate
Grant 9,496,349 - Lutgen , et al. November 15, 2
2016-11-15
Dielectric wafer level bonding with conductive feed-throughs for electrical connection and thermal management
Grant 9,368,428 - Chitnis , et al. June 14, 2
2016-06-14
P-doping Of Group-iii-nitride Buffer Layer Structure On A Heterosubstrate
App 20150357419 - LUTGEN; Stephan ;   et al.
2015-12-10
LED chips having fluorescent substrates with microholes and methods for fabricating
Grant 9,196,799 - Chitnis , et al. November 24, 2
2015-11-24
Wafer level phosphor coating method and devices fabricated utilizing method
Grant 9,159,888 - Chitnis , et al. October 13, 2
2015-10-13
Wafer level phosphor coating method and devices fabricated utilizing method
Grant 9,024,349 - Chitnis , et al. May 5, 2
2015-05-05
Flip-chip Phosphor Coating Method And Devices Fabricated Utilizing Method
App 20150008457 - Chitnis; Ashay ;   et al.
2015-01-08
Emission tuning methods and devices fabricated utilizing methods
Grant 8,877,524 - Chitnis , et al. November 4, 2
2014-11-04
Flip-chip phosphor coating method and devices fabricated utilizing method
Grant 8,878,219 - Chitnis , et al. November 4, 2
2014-11-04
Selective wet etching of gold-tin based solder
Grant 8,617,997 - Chitnis December 31, 2
2013-12-31
Ohmic contacts to nitrogen polarity GaN
Grant 8,021,904 - Chitnis September 20, 2
2011-09-20
Bulk acoustic device and method for fabricating
Grant 7,982,363 - Chitnis July 19, 2
2011-07-19
Light emitting diode chip with electrical insulation element
App 20100224890 - Keller; Bernd ;   et al.
2010-09-09
LED chip
Grant D616,839 - Edmond , et al. June 1, 2
2010-06-01
Emission Tuning Methods And Devices Fabricated Utilizing Methods
App 20090261358 - CHITNIS; ASHAY ;   et al.
2009-10-22
LED chip
Grant D602,450 - Edmond , et al. October 20, 2
2009-10-20
Flip-chip phosphor coating method and devices fabricated utilizing method
App 20090179207 - Chitnis; Ashay ;   et al.
2009-07-16
LED chip
Grant D593,968 - Edmond , et al. June 9, 2
2009-06-09
Wire bond free wafer level LED
App 20090121241 - Keller; Bernd ;   et al.
2009-05-14
LED chips having fluorescent substrates with microholes and methods for fabricating
App 20090065790 - Chitnis; Ashay ;   et al.
2009-03-12
Selective wet etching of gold-tin based solder
App 20090050903 - Chitnis; Ashay
2009-02-26
LED chip
Grant D583,338 - Edmond , et al. December 23, 2
2008-12-23
LED chip
Grant D582,865 - Edmond , et al. December 16, 2
2008-12-16
LED chip
Grant D582,866 - Edmond , et al. December 16, 2
2008-12-16
Bulk acoustic device and method for fabricating
App 20080284541 - Chitnis; Ashay
2008-11-20
Ohmic contacts to nitrogen polarity GaN
App 20080185608 - Chitnis; Ashay
2008-08-07
Wafer level phosphor coating method and devices fabricated utilizing method
App 20080179611 - Chitnis; Ashay ;   et al.
2008-07-31
Wafer level phosphor coating method and devices fabricated utilizing method
App 20080173884 - Chitnis; Ashay ;   et al.
2008-07-24
Permanent wafer bonding using metal alloy preform discs
App 20080096365 - Chitnis; Ashay
2008-04-24
Dielectric wafer level bonding with conductive feed-throughs for electrical connection and thermal management
App 20070284602 - Chitnis; Ashay ;   et al.
2007-12-13

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