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Patent applications and USPTO patent grants for Chintarlapalli Reddy; Harikrishna.The latest application filed is for "cell architecture with an additional oxide diffusion region".
Patent | Date |
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Thin-film resistors with flexible terminal placement for area saving Grant 11,424,054 - Chintarlapalli Reddy , et al. August 23, 2 | 2022-08-23 |
Cell Architecture With An Additional Oxide Diffusion Region App 20220181325 - CHINTARLAPALLI REDDY; Harikrishna ;   et al. | 2022-06-09 |
Thin-film Resistors With Flexible Terminal Placement For Area Saving App 20210287829 - CHINTARLAPALLI REDDY; Harikrishna ;   et al. | 2021-09-16 |
Thin-film resistors with flexible terminal placement for area saving Grant 11,056,253 - Chintarlapalli Reddy , et al. July 6, 2 | 2021-07-06 |
Analog-mixed signal circuit cells with universal Fin pitch and poly pitch Grant 10,978,437 - Holland , et al. April 13, 2 | 2021-04-13 |
Analog-mixed Signal Circuit Cells With Universal Fin Pitch And Poly Pitch App 20200411500 - HOLLAND; Jonathan ;   et al. | 2020-12-31 |
Thin-film Resistors With Flexible Terminal Placement For Area Saving App 20200303094 - CHINTARLAPALLI REDDY; Harikrishna ;   et al. | 2020-09-24 |
Cell architecture with intrinsic decoupling capacitor Grant 10,163,884 - Chintarlapalli Reddy , et al. Dec | 2018-12-25 |
Stacked common gate finFET devices for area optimization Grant 9,397,101 - Chintarlapalli Reddy , et al. July 19, 2 | 2016-07-19 |
Double Patterned Stacking Technique App 20150287709 - CHINTARLAPALLI REDDY; HariKrishna ;   et al. | 2015-10-08 |
Stacked Common Gate Finfet Devices For Area Optimization App 20150255461 - CHINTARLAPALLI REDDY; HariKrishna ;   et al. | 2015-09-10 |
Length-of-diffusion protected circuit and method of design Grant 9,093,995 - Bellur , et al. July 28, 2 | 2015-07-28 |
Length-of-diffusion Protected Circuit And Method Of Design App 20140354338 - Bellur; Kashyap Ramachandra ;   et al. | 2014-12-04 |
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